[S] Change in coreboot[master]: mb/siemens/mc_ehl4: Limit PCIe root port #4 and #5 speed to Gen 1 - coreboot-gerrit

21 Mar 2023


      Attention is currently required from: Mario Scheithauer, Werner Zeh.
Maximilian Brune has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73767 )
Change subject: mb/siemens/mc_ehl4: Limit PCIe root port #4 and #5 speed to Gen 1
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Patch Set 2: Code-Review+1
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I695c0ef961290676fe421b6efd631d6e94d6d556
Gerrit-Change-Number: 73767
Gerrit-PatchSet: 2
Gerrit-Owner: Mario Scheithauer mario.scheithauer@siemens.com
Gerrit-Reviewer: Jan Samek jan.samek@siemens.com
Gerrit-Reviewer: Lean Sheng Tan sheng.tan@9elements.com
Gerrit-Reviewer: Maximilian Brune maximilian.brune@9elements.com
Gerrit-Reviewer: Werner Zeh werner.zeh@siemens.com
Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org
Gerrit-Attention: Mario Scheithauer mario.scheithauer@siemens.com
Gerrit-Attention: Werner Zeh werner.zeh@siemens.com
Gerrit-Comment-Date: Mon, 20 Mar 2023 22:52:52 +0000
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