[M] Change in coreboot[master]: soc/intel/common: Order the different types of cores based on APIC IDs

[Sridhar Siricilla (Code Review)]

Attention is currently required from: Subrata Banik, Sridhar Siricilla, Kyösti Mälkki, Elyes Haouas.

Hello build bot (Jenkins), Subrata Banik, Ronak Kanabar, Sukumar Ghorai, Kyösti Mälkki, Elyes Haouas,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/72132

to look at the new patch set (#17).

Change subject: soc/intel/common: Order the different types of cores based on APIC IDs
......................................................................

soc/intel/common: Order the different types of cores based on APIC IDs

Currently coreboot presents the BSP core first, then efficient cores and
Performance cores as indicated below:

```
grep .  cat /sys/devices/system/cpu/cpu$c/topology/thread_siblings_list
    0-1
    4
    5
    6
    7
    0-1
    2-3
    2-3
```
Existing code presents mix of different cores to OS and causes CPU load
balancing and power/performance impact. So, the patch fixes this
disorder by ordering the Performance cores first, compute die efficient
cores next, and finally SOC efficient cores if they are present. This
is done to run the media applications in a power efficient manner,
please refer thae ChromeOS patch for details:
https://chromium-review.googlesource.com/c/chromiumos/platform2/+/3963893

BUG=b:262886449
TEST=Verified the code on Rex system

After the fix:

```
grep . cat /sys/devices/system/cpu/cpu$c/topology/thread_siblings_list
    0-1
    0-1
    2-3
    2-3
    4
    5
    6
    7
```

Change-Id: I21487a5eb0439ea0cb5976787d1769ee94777469
Signed-off-by: Sridhar Siricilla 
---
M src/soc/intel/common/block/acpi/acpi.c
M src/soc/intel/common/block/acpi/cpu_hybrid.c
M src/soc/intel/common/block/include/intelblocks/acpi.h
3 files changed, 90 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/72132/17