Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41467 )
Change subject: Revert "Revert "pciexp_device: Add option to allocate prefetch memory above 4G boundary"" ......................................................................
Revert "Revert "pciexp_device: Add option to allocate prefetch memory above 4G boundary""
This reverts commit e15f352039a371156ceef37f0434003228166e99.
Reason for revert: Resource allocator patches need to be reverted until the AMD chipsets can be fixed to handle the resource allocation flow correctly.
Change-Id: I94e5866458c79c2719fd780f336fb5da71a7df66 Signed-off-by: Furquan Shaikh furquan@google.com --- M src/device/Kconfig M src/device/pciexp_device.c 2 files changed, 22 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/41467/1
diff --git a/src/device/Kconfig b/src/device/Kconfig index 72d61a1..1c60996 100644 --- a/src/device/Kconfig +++ b/src/device/Kconfig @@ -585,6 +585,21 @@ child devices. This size should be page-aligned. The default is 256 MiB.
+config PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G + bool + default y if !PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G + default n + help + This enables prefetch memory allocation above 4G boundary for the + hotplug resources. + +config PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G + bool "PCI Express Hotplug Prefetch Memory Allocation below 4G boundary" + default n + help + This enables prefetch memory allocation below 4G boundary for the + hotplug resources. + config PCIEXP_HOTPLUG_IO hex "PCI Express Hotplug I/O Space" default 0x2000 diff --git a/src/device/pciexp_device.c b/src/device/pciexp_device.c index 1189207..f04d865 100644 --- a/src/device/pciexp_device.c +++ b/src/device/pciexp_device.c @@ -512,7 +512,7 @@ { struct resource *resource;
- // Add extra memory space + /* Add extra memory space */ resource = new_resource(dev, 0x10); resource->size = CONFIG_PCIEXP_HOTPLUG_MEM; resource->align = 12; @@ -520,7 +520,7 @@ resource->limit = 0xffffffff; resource->flags |= IORESOURCE_MEM;
- // Add extra prefetchable memory space + /* Add extra prefetchable memory space */ resource = new_resource(dev, 0x14); resource->size = CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM; resource->align = 12; @@ -528,7 +528,11 @@ resource->limit = 0xffffffffffffffff; resource->flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH;
- // Add extra I/O space + /* Set resource flag requesting allocation above 4G boundary. */ + if (CONFIG(PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G)) + resource->flags |= IORESOURCE_ABOVE_4G; + + /* Add extra I/O space */ resource = new_resource(dev, 0x18); resource->size = CONFIG_PCIEXP_HOTPLUG_IO; resource->align = 12;
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41467 )
Change subject: Revert "Revert "pciexp_device: Add option to allocate prefetch memory above 4G boundary"" ......................................................................
Patch Set 1:
Should this be ordered earlier in the branch?
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41467 )
Change subject: Revert "Revert "pciexp_device: Add option to allocate prefetch memory above 4G boundary"" ......................................................................
Patch Set 1: Code-Review+1
(1 comment)
https://review.coreboot.org/c/coreboot/+/41467/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/41467/1//COMMIT_MSG@11 PS1, Line 11: Resource allocator patches need to be reverted : until the AMD chipsets can be fixed to handle the resource allocation : flow correctly. Um, I think you want to update this
Hello build bot (Jenkins), Angel Pons,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41467
to look at the new patch set (#2).
Change subject: Revert "Revert "pciexp_device: Add option to allocate prefetch memory above 4G boundary"" ......................................................................
Revert "Revert "pciexp_device: Add option to allocate prefetch memory above 4G boundary""
This reverts commit e15f352039a371156ceef37f0434003228166e99.
Reason for revert: Resource allocator is split into old(v3) and new(v4). So, this change to provide an option to allocate prefetch memory above 4G boundary can be added back. Since the support for allocating above 4G boundary is available only in resource allocator v4, Kconfig option is accordingly updated to add depends on RESOURCE_ALLOCATOR_V4.
Change-Id: I94e5866458c79c2719fd780f336fb5da71a7df66 Signed-off-by: Furquan Shaikh furquan@google.com --- M src/device/Kconfig M src/device/pciexp_device.c 2 files changed, 23 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/41467/2
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41467 )
Change subject: Revert "Revert "pciexp_device: Add option to allocate prefetch memory above 4G boundary"" ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/41467/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/41467/1//COMMIT_MSG@11 PS1, Line 11: Resource allocator patches need to be reverted : until the AMD chipsets can be fixed to handle the resource allocation : flow correctly.
Um, I think you want to update this
Updated in the latest patchset.
Hello build bot (Jenkins), Angel Pons,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41467
to look at the new patch set (#3).
Change subject: Revert "Revert "pciexp_device: Add option to allocate prefetch memory above 4G boundary"" ......................................................................
Revert "Revert "pciexp_device: Add option to allocate prefetch memory above 4G boundary""
This reverts commit e15f352039a371156ceef37f0434003228166e99.
Reason for revert: Resource allocator is split into old(v3) and new(v4). So, this change to provide an option to allocate prefetch memory above 4G boundary can be added back. Since the support for allocating above 4G boundary is available only in resource allocator v4, Kconfig option is accordingly updated to add depends on RESOURCE_ALLOCATOR_V4.
Change-Id: I94e5866458c79c2719fd780f336fb5da71a7df66 Signed-off-by: Furquan Shaikh furquan@google.com --- M src/device/Kconfig M src/device/pciexp_device.c 2 files changed, 23 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/41467/3
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41467 )
Change subject: Revert "Revert "pciexp_device: Add option to allocate prefetch memory above 4G boundary"" ......................................................................
Patch Set 8:
(1 comment)
https://review.coreboot.org/c/coreboot/+/41467/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/41467/1//COMMIT_MSG@11 PS1, Line 11: Resource allocator patches need to be reverted : until the AMD chipsets can be fixed to handle the resource allocation : flow correctly.
Updated in the latest patchset.
Done
Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41467 )
Change subject: Revert "Revert "pciexp_device: Add option to allocate prefetch memory above 4G boundary"" ......................................................................
Patch Set 8: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/41467 )
Change subject: Revert "Revert "pciexp_device: Add option to allocate prefetch memory above 4G boundary"" ......................................................................
Revert "Revert "pciexp_device: Add option to allocate prefetch memory above 4G boundary""
This reverts commit e15f352039a371156ceef37f0434003228166e99.
Reason for revert: Resource allocator is split into old(v3) and new(v4). So, this change to provide an option to allocate prefetch memory above 4G boundary can be added back. Since the support for allocating above 4G boundary is available only in resource allocator v4, Kconfig option is accordingly updated to add depends on RESOURCE_ALLOCATOR_V4.
Change-Id: I94e5866458c79c2719fd780f336fb5da71a7df66 Signed-off-by: Furquan Shaikh furquan@google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/41467 Reviewed-by: Aaron Durbin adurbin@chromium.org Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/device/Kconfig M src/device/pciexp_device.c 2 files changed, 23 insertions(+), 3 deletions(-)
Approvals: build bot (Jenkins): Verified Aaron Durbin: Looks good to me, approved
diff --git a/src/device/Kconfig b/src/device/Kconfig index 55abfe8..79ce77d 100644 --- a/src/device/Kconfig +++ b/src/device/Kconfig @@ -583,6 +583,22 @@ child devices. This size should be page-aligned. The default is 256 MiB.
+config PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G + bool + depends on RESOURCE_ALLOCATOR_V4 + default y if !PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G + default n + help + This enables prefetch memory allocation above 4G boundary for the + hotplug resources. + +config PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G + bool "PCI Express Hotplug Prefetch Memory Allocation below 4G boundary" + default n + help + This enables prefetch memory allocation below 4G boundary for the + hotplug resources. + config PCIEXP_HOTPLUG_IO hex "PCI Express Hotplug I/O Space" default 0x2000 diff --git a/src/device/pciexp_device.c b/src/device/pciexp_device.c index 1189207..f04d865 100644 --- a/src/device/pciexp_device.c +++ b/src/device/pciexp_device.c @@ -512,7 +512,7 @@ { struct resource *resource;
- // Add extra memory space + /* Add extra memory space */ resource = new_resource(dev, 0x10); resource->size = CONFIG_PCIEXP_HOTPLUG_MEM; resource->align = 12; @@ -520,7 +520,7 @@ resource->limit = 0xffffffff; resource->flags |= IORESOURCE_MEM;
- // Add extra prefetchable memory space + /* Add extra prefetchable memory space */ resource = new_resource(dev, 0x14); resource->size = CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM; resource->align = 12; @@ -528,7 +528,11 @@ resource->limit = 0xffffffffffffffff; resource->flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH;
- // Add extra I/O space + /* Set resource flag requesting allocation above 4G boundary. */ + if (CONFIG(PCIEXP_HOTPLUG_PREFETCH_MEM_ABOVE_4G)) + resource->flags |= IORESOURCE_ABOVE_4G; + + /* Add extra I/O space */ resource = new_resource(dev, 0x18); resource->size = CONFIG_PCIEXP_HOTPLUG_IO; resource->align = 12;