Attention is currently required from: Tim Wawrzynczak, Amanda Hwang, EricR Lai. Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55000 )
Change subject: util/spd_tools: Modify MT53E1G32D2NP-046 WT:B LPDDR4 config ......................................................................
Patch Set 1: Code-Review+2
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/55000/comment/88f3d9d2_1f668c50 PS1, Line 7: Modify Fix
https://review.coreboot.org/c/coreboot/+/55000/comment/2ef0f72f_9d401ffb PS1, Line 9: Correct the attributes ranksPerChannel as 2 for LP4x global config. Can you please rephrase this to provide information about the original CL that added it as well? I think that will be helpful for future references too. Probably something like:
CB:52586 ("util/spd_tools: Add MT53E1G32D2NP-046 WT:B LPDDR4 config") incorrectly set ranks per channel to 1. However, MT53E1G32D2NP-046 WT:B part has 2 channels per die and 2 physical dies. Each channel in each die shares DQ-DQS lines with the channel in other die and uses separate CS lines. Thus, number of ranks per channel is 2.
This change fixes the attribute ranksPerChannel for MT53E1G32D2NP-046 WT:B in LP4x global config by setting it to 2.
Patchset:
PS1: Martin/Karthik - Once this lands, CB:52587 will require update too so that the correct SPD file gets used by guybrush.
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Furquan Shaikh (Code Review)