[M] Change in coreboot[master]: soc/intel/cse_lite: Back up PSR data during CSE FW downgrade

[Anil Kumar K (Code Review)]

Attention is currently required from: Subrata Banik.

Anil Kumar K has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74577 )

Change subject: soc/intel/cse_lite: Back up PSR data during CSE FW downgrade
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Patch Set 27:

(2 comments)

This change is ready for review.

File src/soc/intel/common/block/include/intelblocks/cse.h:

https://review.coreboot.org/c/coreboot/+/74577/comment/2c618c1e_732c89e1 
PS17, Line 84: #define PSR_BACKUP_STATUS_CMOS_OFFSET 161
> how do u know if this offset is not occupied by some other operation already ?

i found this by adding prints in cmos_write to check the list of addresses being accessed. I am not aware if there is a better way to identify a free space

https://review.coreboot.org/c/coreboot/+/74577/comment/11133242_2c61dfbb 
PS17, Line 114: typedef
> don't use `typedef`

Done