Change in coreboot[master]: sb/intel/haswell: Use common smm save state ops

[Arthur Heymans (Code Review)]

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37012 )

Change subject: sb/intel/haswell: Use common smm save state ops
......................................................................

sb/intel/haswell: Use common smm save state ops

Change-Id: I6db0a63a0c55ee1c8e67948fd4f4024f886597e6
Signed-off-by: Arthur Heymans 
---
M src/southbridge/intel/lynxpoint/smihandler.c
1 file changed, 49 insertions(+), 36 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/37012/1

diff --git a/src/southbridge/intel/lynxpoint/smihandler.c b/src/southbridge/intel/lynxpoint/smihandler.c
index 61f86fb..a863fc8 100644
--- a/src/southbridge/intel/lynxpoint/smihandler.c
+++ b/src/southbridge/intel/lynxpoint/smihandler.c
@@ -22,7 +22,6 @@
 #include <cpu/x86/cache.h>
 #include <device/pci_def.h>
 #include <cpu/x86/smm.h>
-#include <cpu/intel/em64t101_save_state.h>
 #include <elog.h>
 #include <halt.h>
 #include <pc80/mc146818rtc.h>
@@ -214,62 +213,71 @@
  * core in case we are not running on the same core that
  * initiated the IO transaction.
  */
-static em64t101_smm_state_save_area_t *smi_apmc_find_state_save(u8 cmd)
+static int smi_apmc_find_state_save_node(u8 cmd)
 {
-	em64t101_smm_state_save_area_t *state;
+	const struct smm_save_state_ops *ops = get_save_state_ops();
    int node;

/* Check all nodes looking for the one that issued the IO */
    for (node = 0; node < CONFIG_MAX_CPUS; node++) {
-		state = smm_get_save_state(node);
-
-		/* Check for Synchronous IO (bit0 == 1) */
-		if (!(state->io_misc_info & (1 << 0)))
-			continue;
-
-		/* Make sure it was a write (bit4 == 0) */
-		if (state->io_misc_info & (1 << 4))
-			continue;
-
-		/* Check for APMC IO port */
-		if (((state->io_misc_info >> 16) & 0xff) != APM_CNT)
-			continue;
-
+		uint32_t io_misc_info;
+		uint64_t rax;
+		if (ops->get_reg(node, RAX, &rax))
+			continue; /* ??? */
    	/* Check AX against the requested command */
-		if ((state->rax & 0xff) != cmd)
+		if ((rax & 0xff) != cmd)
    		continue;
+		if (ops->get_io_misc_info(node, &io_misc_info)) {

-		return state;
+			/* Check for Synchronous IO (bit0 == 1) */
+			if (!(io_misc_info & (1 << 0)))
+				continue;
+
+			/* Make sure it was a write (bit4 == 0) */
+			if (io_misc_info & (1 << 4))
+				continue;
+
+			/* Check for APMC IO port */
+			if (((io_misc_info >> 16) & 0xff) != APM_CNT)
+				continue;
+		}
+
+		return node;
    }

-	return NULL;
+	return -1;
 }

static void southbridge_smi_gsmi(void)
 {
-	u32 *ret, *param;
+	u32 ret, param;
    u8 sub_command;
-	em64t101_smm_state_save_area_t *io_smi =
-		smi_apmc_find_state_save(APM_CNT_ELOG_GSMI);
+	int node = smi_apmc_find_state_save_node(APM_CNT_ELOG_GSMI);
+	const struct smm_save_state_ops *ops = get_save_state_ops();

-	if (!io_smi)
+	if (node < -1)
    	return;

/* Command and return value in EAX */
-	ret = (u32*)&io_smi->rax;
-	sub_command = (u8)(*ret >> 8);
+	uint64_t reg;
+	if (ops->get_reg(node, RAX, &reg))
+		return;
+	sub_command = (u8)(reg >> 8);

/* Parameter buffer in EBX */
-	param = (u32*)&io_smi->rbx;
+	if (ops->get_reg(node, RBX, &reg))
+		return;
+	param = reg & UINT32_MAX;

/* drivers/elog/gsmi.c */
-	*ret = gsmi_exec(sub_command, param);
+	ret = gsmi_exec(sub_command, (u32 *)param);
+	ops->set_reg(node, RAX, reg);
 }

static void southbridge_smi_apmc(void)
 {
    u8 reg8;
-	em64t101_smm_state_save_area_t *state;
+	const struct smm_save_state_ops *ops = get_save_state_ops();
    static int chipset_finalized = 0;

/* Emulate B2 register as the FADT / Linux expects it */
@@ -317,13 +325,18 @@
    		       "SMI#: SMM structures already initialized!\n");
    		return;
    	}
-		state = smi_apmc_find_state_save(reg8);
-		if (state) {
-			/* EBX in the state save contains the GNVS pointer */
-			gnvs = (global_nvs_t *)((u32)state->rbx);
-			smm_initialized = 1;
-			printk(BIOS_DEBUG, "SMI#: Setting GNVS to %p\n", gnvs);
-		}
+		int node = smi_apmc_find_state_save_node(APM_CNT_GNVS_UPDATE);
+		if (node < -1)
+			return;
+
+		uint64_t rbx;
+		if (ops->get_reg(node, RBX, &rbx))
+			return;
+
+		/* EBX in the state save contains the GNVS pointer */
+		gnvs = (global_nvs_t *)(u32)rbx;
+		smm_initialized = 1;
+		printk(BIOS_DEBUG, "SMI#: Setting GNVS to %p\n", gnvs);
    	break;
    case 0xca:
    	usb_xhci_route_all();

[Arthur Heymans (Code Review)]

Arthur Heymans has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/37012 )

Change subject: sb/intel/haswell: Use common smm save state ops
......................................................................

Abandoned

superseded in common_smm_save_state