Hello build bot (Jenkins), Patrick Georgi, Furquan Shaikh, Angel Pons, Subrata Banik, Aamir Bohra, Andrey Petrov, Patrick Rudolph, Nico Huber, Martin Roth, Tim Wawrzynczak, siemens-bot, Werner Zeh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/45951
to look at the new patch set (#22).
Change subject: soc/intel: deduplicate ACPI timer emulation ......................................................................
soc/intel: deduplicate ACPI timer emulation
The code for enabling ACPI timer emulation is the same for the SoCs SKL, CNL, ICL, TGL, JSL and EHL. Deduplicate it by moving it to common code.
APL differs in not having the delay settings. However, the bits are marked as "spare" and BWG mentions there are no "reserved bit checks done". Thus, we can write them unconditionally without any effect.
Note: The ACPI timer emulation can only be used by SoCs with microcode supporting CTC (Common Timer Copy) / ACPI timer emulation.
Change-Id: Ied4b312b6d53e80e71c55f4d1ca78a8cb2799793 Signed-off-by: Michael Niewöhner foss@mniewoehner.de --- M src/soc/intel/alderlake/cpu.c M src/soc/intel/apollolake/Makefile.inc M src/soc/intel/apollolake/include/soc/pm.h M src/soc/intel/apollolake/pmutil.c M src/soc/intel/cannonlake/cpu.c M src/soc/intel/common/block/cpu/Makefile.inc A src/soc/intel/common/block/cpu/pm_timer_emulation.c M src/soc/intel/common/block/include/intelblocks/cpulib.h M src/soc/intel/elkhartlake/cpu.c M src/soc/intel/icelake/cpu.c M src/soc/intel/jasperlake/cpu.c M src/soc/intel/skylake/cpu.c M src/soc/intel/tigerlake/cpu.c 13 files changed, 36 insertions(+), 167 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/45951/22