Patch merged into coreboot/master: rockchip/rk3399: set edp pclk to 25MHz

the following patch was just integrated into master:
commit 4ecccff72f1876c264303aac48cb7143fe36cecc
Author: Lin Huang 
Date:   Wed Jan 18 09:44:34 2017 +0800

rockchip/rk3399: set edp pclk to 25MHz

It may cause an edp aux transfer error if the edp pclk is
    set too high, so reduce it to 25MHz.

BUG=chrome-os-partner:60130
    BRANCH=None
    TEST=Build and Boot

Change-Id: Id1063baa5a82637b03c0f1f754181df074ab17cc
    Signed-off-by: Patrick Georgi 
    Original-Commit-Id: 8f7ce31a7483e765ae0c86f8e62ef51413ee1596
    Original-Change-Id: Ibb86c12c1d7c00dc3b4cc7a6bdf3bd6e895cd9f3
    Original-Signed-off-by: Lin Huang 
    Original-Reviewed-on: https://chromium-review.googlesource.com/429410
    Original-Commit-Ready: Julius Werner 
    Original-Tested-by: Julius Werner 
    Original-Reviewed-by: Julius Werner 
    Reviewed-on: https://review.coreboot.org/18178
    Tested-by: build bot (Jenkins)
    Reviewed-by: Paul Menzel 
    Reviewed-by: Martin Roth

See https://review.coreboot.org/18178 for details.

-gerrit