Alexandru Gagniuc (mr.nuke.me@gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13342
-gerrit
commit 23a9dc12ab34bcf2f0af952bc18fed618a89c8bb Author: Alexandru Gagniuc alexandrux.gagniuc@intel.com Date: Wed Nov 4 16:25:47 2015 -0800
soc/apollolake: Add chip_operations structure to enable bus scans
With the chip_operations structure in place, PCI enumeration now works in ramstage.
Change-Id: I9a39f4d6d7233a9cc696c71e96e0c17d4db3c925 Signed-off-by: Alexandru Gagniuc alexandrux.gagniuc@intel.com --- src/soc/intel/apollolake/Makefile.inc | 1 + src/soc/intel/apollolake/chip.c | 52 +++++++++++++++++++++++++++++++++++ 2 files changed, 53 insertions(+)
diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc index 7cddf5a..63c39b3 100644 --- a/src/soc/intel/apollolake/Makefile.inc +++ b/src/soc/intel/apollolake/Makefile.inc @@ -23,6 +23,7 @@ romstage-y += mmap_boot.c romstage-y += romstage/romstage.c romstage-y += uart_early.c
+ramstage-y += chip.c ramstage-y += cpu.c ramstage-y += gpio.c ramstage-y += memmap.c diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c new file mode 100644 index 0000000..2b6384a --- /dev/null +++ b/src/soc/intel/apollolake/chip.c @@ -0,0 +1,52 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2015 Intel Corp. + * (Written by Alexandru Gagniuc alexandrux.gagniuc@intel.com for Intel Corp.) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include <cpu/cpu.h> +#include <device/device.h> +#include <device/pci.h> + +static struct device_operations pci_domain_ops = { + .read_resources = pci_domain_read_resources, + .set_resources = DEVICE_NOOP, + .enable_resources = NULL, + .init = NULL, + .scan_bus = pci_domain_scan_bus, + .ops_pci_bus = pci_bus_default_ops, +}; + +static void cpu_bus_init(device_t dev) +{ + initialize_cpus(dev->link_list); +} + +static struct device_operations cpu_bus_ops = { + .read_resources = DEVICE_NOOP, + .set_resources = DEVICE_NOOP, + .enable_resources = DEVICE_NOOP, + .init = cpu_bus_init, + .scan_bus = 0, +}; + +static void enable_dev(device_t dev) +{ + /* Set the operations if it is a special bus type */ + if (dev->path.type == DEVICE_PATH_DOMAIN) { + dev->ops = &pci_domain_ops; + } else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) { + dev->ops = &cpu_bus_ops; + } +} + +struct chip_operations soc_intel_apollolake_ops = { + CHIP_NAME("Intel Apollolake SOC") + .enable_dev = &enable_dev, +};