Attention is currently required from: Sajida Bhanu. Hello Sajida Bhanu,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/56039
to review the following change.
Change subject: HACK: SKU2 Limit SPI NOR size to 8MB HACK ......................................................................
HACK: SKU2 Limit SPI NOR size to 8MB HACK
Limit SPI NOR size to 8MB to match with coreboot rom size by changing number of sectors.
Change-Id: I2386f9c52677b263a972dc4041a2643d36130a1b Signed-off-by: Shaik Sajida Bhanu sbhanu@codeaurora.org --- M src/drivers/spi/winbond.c 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/56039/1
diff --git a/src/drivers/spi/winbond.c b/src/drivers/spi/winbond.c index f9abc43..9fe0492 100644 --- a/src/drivers/spi/winbond.c +++ b/src/drivers/spi/winbond.c @@ -193,7 +193,7 @@ { /* W25Q512NW-IM */ .id[0] = 0x8020, - .nr_sectors_shift = 14, + .nr_sectors_shift = 11, .fast_read_dual_output_support = 1, .protection_granularity_shift = 16, .bp_bits = 4,