Change in coreboot[master]: [WIP] mb/google/guybrush/port_descriptors: add dummy descriptors

[Felix Held (Code Review)]

Attention is currently required from: Matt Papageorge.
Hello Matt Papageorge,

I'd like you to do a code review. Please visit

https://review.coreboot.org/c/coreboot/+/52141

to review the following change.

Change subject: [WIP] mb/google/guybrush/port_descriptors: add dummy descriptors
......................................................................

[WIP] mb/google/guybrush/port_descriptors: add dummy descriptors

Signed-off-by: Matt Papageorge 
Signed-off-by: Felix Held 
Change-Id: Ie4c8ff8e827901112fd8b2e993898006bc133241
---
M src/mainboard/google/guybrush/port_descriptors.c
1 file changed, 22 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/52141/1

diff --git a/src/mainboard/google/guybrush/port_descriptors.c b/src/mainboard/google/guybrush/port_descriptors.c
index 3227812..cc1fa1a 100644
--- a/src/mainboard/google/guybrush/port_descriptors.c
+++ b/src/mainboard/google/guybrush/port_descriptors.c
@@ -53,6 +53,28 @@
    	.clk_req = CLK_REQ3,
    	.gpio_group_id = GPIO_40,
    	.port_params = {PP_PSPP_AC, 0x133, PP_PSPP_DC, 0x122}
+	},
+	{ /* TODO: remove this temporay workaround */
+		.engine_type = PCIE_ENGINE,
+		.port_present = true,
+		.start_logical_lane = 8,
+		.end_logical_lane = 11,
+		.device_number = 2,
+		.function_number = 5,
+		.turn_off_unused_lanes = true,
+		.clk_req = CLK_REQ5,
+		.port_params = {PP_PSPP_AC, 0x133, PP_PSPP_DC, 0x122}
+	},
+	{ /* TODO: remove this temporay workaround */
+		.engine_type = PCIE_ENGINE,
+		.port_present = true,
+		.start_logical_lane = 16,
+		.end_logical_lane = 23,
+		.device_number = 1,
+		.function_number = 1,
+		.turn_off_unused_lanes = true,
+		.clk_req = CLK_REQ6,
+		.port_params = {PP_PSPP_AC, 0x133, PP_PSPP_DC, 0x122}
    }
 };