Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/40769 )
Change subject: soc/amd/sata: Move SATA PCI device from DSDT to SSDT ......................................................................
soc/amd/sata: Move SATA PCI device from DSDT to SSDT
This change adds support in common block SATA driver to add a PCI device for SATA in SSDT and removes the SATA device from DSDT.
BUG=b:153858769
Change-Id: I16ac36d997496ff33c5b44ec9bd2731b2b8799eb Signed-off-by: Furquan Shaikh furquan@google.com --- M src/soc/amd/common/block/sata/sata.c M src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl 2 files changed, 2 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/40769/1
diff --git a/src/soc/amd/common/block/sata/sata.c b/src/soc/amd/common/block/sata/sata.c index f9b6549..2dd0d42 100644 --- a/src/soc/amd/common/block/sata/sata.c +++ b/src/soc/amd/common/block/sata/sata.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* This file is part of the coreboot project. */
+#include <arch/acpigen.h> #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> @@ -19,6 +20,7 @@ .enable_resources = pci_dev_enable_resources, .init = soc_enable_sata_features, .acpi_name = sata_acpi_name, + .acpi_fill_ssdt = acpi_device_write_pci_dev, };
static const unsigned short pci_device_ids[] = { diff --git a/src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl b/src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl index 8cf8da4..cfd2f1d 100644 --- a/src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl +++ b/src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl @@ -23,11 +23,6 @@
/* Describe the Southbridge devices */
-/* 0:11.0 - SATA */ -Device(STCR) { - Name(_ADR, 0x00110000) -} /* end STCR */ - /* 0:14.0 - SMBUS */ Device(SBUS) { Name(_ADR, 0x00140000)
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40769 )
Change subject: soc/amd/sata: Move SATA PCI device from DSDT to SSDT ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/40769/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/40769/1//COMMIT_MSG@11 PS1, Line 11: What is the advantage of having it in SSDT?
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40769 )
Change subject: soc/amd/sata: Move SATA PCI device from DSDT to SSDT ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/40769/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/40769/1//COMMIT_MSG@11 PS1, Line 11:
What is the advantage of having it in SSDT?
It allows to keep the ACPI name and the devices in sync. There were some inconsistencies that were noticed which was causing either the device to be added under the wrong path in DSDT or name getting out of sync.
Hello build bot (Jenkins), Aaron Durbin,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/40769
to look at the new patch set (#2).
Change subject: soc/amd/sata: Move SATA PCI device from DSDT to SSDT ......................................................................
soc/amd/sata: Move SATA PCI device from DSDT to SSDT
This change adds support in common block SATA driver to add a PCI device for SATA in SSDT and removes the SATA device from DSDT.
This makes it easier to ensure that we don't accidentally make the DSDT and SSDT entries inconsistent w.r.t. ACPI name and scope.
BUG=b:153858769
Change-Id: I16ac36d997496ff33c5b44ec9bd2731b2b8799eb Signed-off-by: Furquan Shaikh furquan@google.com --- M src/soc/amd/common/block/sata/sata.c M src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl 2 files changed, 2 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/40769/2
Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40769 )
Change subject: soc/amd/sata: Move SATA PCI device from DSDT to SSDT ......................................................................
Patch Set 2: Code-Review+2
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40769 )
Change subject: soc/amd/sata: Move SATA PCI device from DSDT to SSDT ......................................................................
Patch Set 2: Code-Review+2
Furquan Shaikh has submitted this change. ( https://review.coreboot.org/c/coreboot/+/40769 )
Change subject: soc/amd/sata: Move SATA PCI device from DSDT to SSDT ......................................................................
soc/amd/sata: Move SATA PCI device from DSDT to SSDT
This change adds support in common block SATA driver to add a PCI device for SATA in SSDT and removes the SATA device from DSDT.
This makes it easier to ensure that we don't accidentally make the DSDT and SSDT entries inconsistent w.r.t. ACPI name and scope.
BUG=b:153858769
Change-Id: I16ac36d997496ff33c5b44ec9bd2731b2b8799eb Signed-off-by: Furquan Shaikh furquan@google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/40769 Reviewed-by: Aaron Durbin adurbin@chromium.org Reviewed-by: Angel Pons th3fanbus@gmail.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/amd/common/block/sata/sata.c M src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl 2 files changed, 2 insertions(+), 5 deletions(-)
Approvals: build bot (Jenkins): Verified Aaron Durbin: Looks good to me, approved Angel Pons: Looks good to me, approved
diff --git a/src/soc/amd/common/block/sata/sata.c b/src/soc/amd/common/block/sata/sata.c index f9b6549..2dd0d42 100644 --- a/src/soc/amd/common/block/sata/sata.c +++ b/src/soc/amd/common/block/sata/sata.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* This file is part of the coreboot project. */
+#include <arch/acpigen.h> #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> @@ -19,6 +20,7 @@ .enable_resources = pci_dev_enable_resources, .init = soc_enable_sata_features, .acpi_name = sata_acpi_name, + .acpi_fill_ssdt = acpi_device_write_pci_dev, };
static const unsigned short pci_device_ids[] = { diff --git a/src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl b/src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl index 8cf8da4..cfd2f1d 100644 --- a/src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl +++ b/src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl @@ -23,11 +23,6 @@
/* Describe the Southbridge devices */
-/* 0:11.0 - SATA */ -Device(STCR) { - Name(_ADR, 0x00110000) -} /* end STCR */ - /* 0:14.0 - SMBUS */ Device(SBUS) { Name(_ADR, 0x00140000)
-
Aaron Durbin (Code Review) -
Angel Pons (Code Review)
-
Furquan Shaikh (Code Review)
-
Paul Menzel (Code Review)