[XS] Change in coreboot[main]: mb/google/nissa/var/riven: Configure Acoustic noise mitigation

[Eric Lai (Code Review)]

Eric Lai has submitted this change. ( https://review.coreboot.org/c/coreboot/+/84908?usp=email )

Change subject: mb/google/nissa/var/riven: Configure Acoustic noise mitigation
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mb/google/nissa/var/riven: Configure Acoustic noise mitigation

Follow the power team’s recommendation:
- Enable Acoustic noise mitigation
- Set slow slew rate VCCIA and VCCGT to SLEW_FAST_4
- Set FastPkgCRampDisable VCCIA and VCCGT to 1

BUG=b:376165743
TEST=built firmware and verified by power team,
     the acoustic noise can be improved a lot.

Change-Id: Ia71985ef21d634763fc5ae22e4f611f7f5e9652a
Signed-off-by: David Wu 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84908
Tested-by: build bot (Jenkins) 
Reviewed-by: Eric Lai 
Reviewed-by: Kapil Porwal 
Reviewed-by: Subrata Banik 
Reviewed-by: Jayvik Desai 
---
M src/mainboard/google/brya/variants/riven/overridetree.cb
1 file changed, 7 insertions(+), 0 deletions(-)

Approvals:
  Eric Lai: Looks good to me, approved
  Jayvik Desai: Looks good to me, approved
  build bot (Jenkins): Verified
  Subrata Banik: Looks good to me, approved
  Kapil Porwal: Looks good to me, approved

diff --git a/src/mainboard/google/brya/variants/riven/overridetree.cb b/src/mainboard/google/brya/variants/riven/overridetree.cb
index d565897..00947c4 100644
--- a/src/mainboard/google/brya/variants/riven/overridetree.cb
+++ b/src/mainboard/google/brya/variants/riven/overridetree.cb
@@ -24,6 +24,13 @@
 end

chip soc/intel/alderlake
+	# Acoustic settings
+	register "acoustic_noise_mitigation" = "1"
+	register "slow_slew_rate[VR_DOMAIN_IA]" = "SLEW_FAST_4"
+	register "slow_slew_rate[VR_DOMAIN_GT]" = "SLEW_FAST_4"
+	register "fast_pkg_c_ramp_disable[VR_DOMAIN_IA]" = "1"
+	register "fast_pkg_c_ramp_disable[VR_DOMAIN_GT]" = "1"
+
    register "sagv" = "SaGv_Enabled"

# EMMC Tx CMD Delay