[S] Change in coreboot[master]: soc/intel/xeon_sp: Use simple device function for setting PMAX_LOCK

[Paul Menzel (Code Review)]

Attention is currently required from: Marc Jones, Jonathan Zhang, TimLiu-SMCI, Johnny Lin, Christian Walter, Angel Pons, Jian-Ming Wang, Arthur Heymans, Tim Chu.

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72400 )

Change subject: soc/intel/xeon_sp: Use simple device function for setting PMAX_LOCK
......................................................................

Patch Set 3:

(1 comment)

File src/soc/intel/xeon_sp/util.c:

https://review.coreboot.org/c/coreboot/+/72400/comment/0fcc96f0_385c6214 
PS1, Line 319: data = pci_s_read_config32(PCI_DEV(bus, PCU_DEV, PCU_CR0_FUN), PCU_CR0_PMAX);
             : 	data |= PMAX_LOCK;
             : 	pci_s_write_config32(PCI_DEV(bus, PCU_DEV, PCU_CR0_FUN), PCU_CR0_PMAX, data);
> The simple variant uses a PCI B:D. […]

Could/should that be done instead, or should the current commit be submitted?