Change in coreboot[master]: [RFC] ChromeOS: Declare CHROMEOS_NO_GPIOS

[Kyösti Mälkki (Code Review)]

Attention is currently required from: Jason Glenesk, Marshall Dawson, Julius Werner, Yu-Ping Wu, Felix Held.
Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/58956 )

Change subject: [RFC] ChromeOS: Declare CHROMEOS_NO_GPIOS
......................................................................

[RFC] ChromeOS: Declare CHROMEOS_NO_GPIOS

Implementation of fill_lb_gpios() is not about VBOOT
but providing payload with information of bootmode.

Change-Id: I9f1eaaeffe388a7f8a7fc2430b6593eb8298461b
Signed-off-by: Kyösti Mälkki 
---
M src/lib/coreboot_table.c
M src/mainboard/amd/majolica/Kconfig
M src/mainboard/amd/majolica/chromeos.c
M src/mainboard/google/corsola/Kconfig
M src/mainboard/google/corsola/chromeos.c
M src/mainboard/google/mistral/Kconfig
M src/mainboard/google/mistral/Makefile.inc
D src/mainboard/google/mistral/chromeos.c
M src/security/vboot/bootmode.c
M src/vendorcode/google/chromeos/Kconfig
10 files changed, 10 insertions(+), 32 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/58956/1

diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c
index d0cba80..0d65a82 100644
--- a/src/lib/coreboot_table.c
+++ b/src/lib/coreboot_table.c
@@ -160,7 +160,9 @@
    gpios->tag = LB_TAG_GPIO;
    gpios->size = sizeof(*gpios);
    gpios->count = 0;
-	fill_lb_gpios(gpios);
+
+	if (!CONFIG(CHROMEOS_NO_GPIOS))
+		fill_lb_gpios(gpios);

printk(BIOS_INFO, "Passing %u GPIOs to payload:\n"
    	"            NAME |       PORT | POLARITY |     VALUE\n",
diff --git a/src/mainboard/amd/majolica/Kconfig b/src/mainboard/amd/majolica/Kconfig
index cba0a0f..604dfee 100644
--- a/src/mainboard/amd/majolica/Kconfig
+++ b/src/mainboard/amd/majolica/Kconfig
@@ -10,6 +10,7 @@
    select SOC_AMD_COMMON_BLOCK_USE_ESPI
    select AMD_SOC_CONSOLE_UART
    select MAINBOARD_HAS_CHROMEOS
+	select CHROMEOS_NO_GPIOS

config FMDFILE
    default "src/mainboard/amd/majolica/chromeos.fmd" if CHROMEOS
diff --git a/src/mainboard/amd/majolica/chromeos.c b/src/mainboard/amd/majolica/chromeos.c
index 400f099..5fecbe0 100644
--- a/src/mainboard/amd/majolica/chromeos.c
+++ b/src/mainboard/amd/majolica/chromeos.c
@@ -1,16 +1,8 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */

#include <bootmode.h>
-#include <boot/coreboot_tables.h>
-#include <gpio.h>
 #include <vendorcode/google/chromeos/chromeos.h>

-void fill_lb_gpios(struct lb_gpios *gpios)
-{
-	struct lb_gpio chromeos_gpios[] = {};
-	lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));
-}
-
 int get_write_protect_state(void)
 {
    /* Majolica doesn't have a write protect pin */
diff --git a/src/mainboard/google/corsola/Kconfig b/src/mainboard/google/corsola/Kconfig
index 8b38d2b..94ca8c5 100644
--- a/src/mainboard/google/corsola/Kconfig
+++ b/src/mainboard/google/corsola/Kconfig
@@ -11,6 +11,7 @@
    select SOC_MEDIATEK_MT8186
    select BOARD_ROMSIZE_KB_8192
    select MAINBOARD_HAS_CHROMEOS
+	select CHROMEOS_NO_GPIOS
    select COMMON_CBFS_SPI_WRAPPER
    select SPI_FLASH
    select SPI_FLASH_INCLUDE_ALL_DRIVERS
diff --git a/src/mainboard/google/corsola/chromeos.c b/src/mainboard/google/corsola/chromeos.c
index 3f0937f..c3eab30 100644
--- a/src/mainboard/google/corsola/chromeos.c
+++ b/src/mainboard/google/corsola/chromeos.c
@@ -1,12 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

#include <bootmode.h>
-#include <boot/coreboot_tables.h>
-
-void fill_lb_gpios(struct lb_gpios *gpios)
-{
-
-}

int get_recovery_mode_switch(void)
 {
diff --git a/src/mainboard/google/mistral/Kconfig b/src/mainboard/google/mistral/Kconfig
index 0703cbd..bac4803 100644
--- a/src/mainboard/google/mistral/Kconfig
+++ b/src/mainboard/google/mistral/Kconfig
@@ -13,6 +13,7 @@
    select SPI_FLASH_GIGADEVICE
    select SPI_FLASH_WINBOND
    select MAINBOARD_HAS_CHROMEOS
+	select CHROMEOS_NO_GPIOS

config VBOOT
    select VBOOT_VBNV_FLASH
diff --git a/src/mainboard/google/mistral/Makefile.inc b/src/mainboard/google/mistral/Makefile.inc
index 48faadf..69f9e69 100644
--- a/src/mainboard/google/mistral/Makefile.inc
+++ b/src/mainboard/google/mistral/Makefile.inc
@@ -1,16 +1,12 @@

-bootblock-y += chromeos.c
 bootblock-y += reset.c
 bootblock-y += bootblock.c

-verstage-y += chromeos.c
 verstage-y += reset.c
 verstage-y += verstage.c

-romstage-y += chromeos.c
 romstage-y += reset.c
 romstage-y += romstage.c

-ramstage-y += chromeos.c
 ramstage-y += reset.c
 ramstage-y += mainboard.c
diff --git a/src/mainboard/google/mistral/chromeos.c b/src/mainboard/google/mistral/chromeos.c
deleted file mode 100644
index c827c7d..0000000
--- a/src/mainboard/google/mistral/chromeos.c
+++ /dev/null
@@ -1,8 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <boot/coreboot_tables.h>
-
-void fill_lb_gpios(struct lb_gpios *gpios)
-{
-
-}
diff --git a/src/security/vboot/bootmode.c b/src/security/vboot/bootmode.c
index 6c05109..c4c6441 100644
--- a/src/security/vboot/bootmode.c
+++ b/src/security/vboot/bootmode.c
@@ -71,9 +71,4 @@
 {
    return 0;
 }
-
-void __weak fill_lb_gpios(struct lb_gpios *gpios)
-{
-}
-
 #endif
diff --git a/src/vendorcode/google/chromeos/Kconfig b/src/vendorcode/google/chromeos/Kconfig
index 605b09e..36ca023 100644
--- a/src/vendorcode/google/chromeos/Kconfig
+++ b/src/vendorcode/google/chromeos/Kconfig
@@ -20,6 +20,10 @@
      the coreboot table. NOTE: Enabling this option on an unsupported
      board will most likely break your build.

+config CHROMEOS_NO_GPIOS
+	bool
+	depends on MAINBOARD_HAS_CHROMEOS
+
 if CHROMEOS

config CR50_IMMEDIATELY_COMMIT_FW_SECDATA