[S] Change in coreboot[master]: nb/intel/i945/raminit.c: Try and read whole SPD if DEBUG_RAM_SETUP.

[Roc Vallès i Domènech (Code Review)]

Roc Vallès i Domènech has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69157 )

Change subject: nb/intel/i945/raminit.c: Try and read whole SPD if DEBUG_RAM_SETUP.
......................................................................

nb/intel/i945/raminit.c: Try and read whole SPD if DEBUG_RAM_SETUP.

If DEBUG_RAM_SETUP is set, dram_print_spd_ddr2() will be called.
This will printk fields of the SPD which are above the checksum. Unless
these are read, gibberish will be printed. Thus, we make a modest
attempt to read the rest of the SPD.

Change-Id: I770ea9987ea9f616a32ea907bee9a153f4ff133d
Signed-off-by: Roc Vallès Domènech 
---
M src/northbridge/intel/i945/raminit.c
1 file changed, 28 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/69157/1

diff --git a/src/northbridge/intel/i945/raminit.c b/src/northbridge/intel/i945/raminit.c
index 2613b81..ada4abe 100644
--- a/src/northbridge/intel/i945/raminit.c
+++ b/src/northbridge/intel/i945/raminit.c
@@ -358,6 +358,19 @@
    			hexdump(raw_spd, 64);
    	}

+		/*
+		 * With DEBUG_RAM_SETUP, spd_decode_ddr2() will print fields
+		 * that are above the first 64 bytes.
+		 */
+		if (CONFIG(DEBUG_RAM_SETUP) && raw_spd[0] > 64) {
+			bytes_read = i2c_eeprom_read(device, 64,
+				raw_spd[0] <= SPD_SIZE_MAX_DDR2	? raw_spd[0]-64
+				: SPD_SIZE_MAX_DDR2-64, &raw_spd[64]);
+			if (bytes_read < raw_spd[0]-64) {
+				printk(BIOS_WARNING, "SPD could not be read entirely "
+					"past checksum.\n");
+			}
+		}
    	if (spd_decode_ddr2(&dimm_info, raw_spd) != SPD_STATUS_OK) {
    		printk(BIOS_WARNING, "Encountered problems with SPD, "
    			"skipping this DIMM.\n");