Martin Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68050 )
Change subject: nb/intel/i945/memmap.c: Clean up includes ......................................................................
nb/intel/i945/memmap.c: Clean up includes
Signed-off-by: Elyes Haouas ehaouas@noos.fr Change-Id: Ie5d7d1dd446428d12a2f904545682e8fb9cd82f9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68050 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Martin L Roth gaumless@gmail.com --- M src/northbridge/intel/i945/memmap.c 1 file changed, 16 insertions(+), 4 deletions(-)
Approvals: build bot (Jenkins): Verified Martin L Roth: Looks good to me, approved
diff --git a/src/northbridge/intel/i945/memmap.c b/src/northbridge/intel/i945/memmap.c index 58e29c8..1fa0358 100644 --- a/src/northbridge/intel/i945/memmap.c +++ b/src/northbridge/intel/i945/memmap.c @@ -3,17 +3,16 @@ // Use simple device model for this file even in ramstage #define __SIMPLE_DEVICE__
-#include <device/pci_ops.h> #include <arch/romstage.h> #include <cbmem.h> -#include "i945.h" #include <console/console.h> #include <cpu/x86/mtrr.h> #include <cpu/x86/smm.h> -#include <program_loading.h> -#include <cpu/intel/smm_reloc.h> +#include <device/pci_ops.h> #include <types.h>
+#include "i945.h" + /* Decodes TSEG region size to bytes. */ u32 decode_tseg_size(const u8 esmramc) {