Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/48158 )
Change subject: soc/intel/apollolake: LZ4 Compress FSP-M ......................................................................
soc/intel/apollolake: LZ4 Compress FSP-M
FSP-M is not run XIP so it can be compressed. This more than halves the binary size. 364544 bytes -> 168616 bytes.
On the up/squared this also results in a 83ms speedup.
TESTED: up/squared boots.
Change-Id: Ic76b51f0f3007b59ccb9f76b6a57bb9265dab833 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/soc/intel/apollolake/Kconfig 1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/48158/1
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig index 4f762a9..bf7cd0b 100644 --- a/src/soc/intel/apollolake/Kconfig +++ b/src/soc/intel/apollolake/Kconfig @@ -46,6 +46,7 @@ select MRC_SETTINGS_PROTECT select MRC_SETTINGS_VARIABLE_DATA select NO_XIP_EARLY_STAGES + select FSP_COMPRESS_FSP_M_LZ4 select PARALLEL_MP select PARALLEL_MP_AP_WORK select PCIEXP_ASPM
Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48158 )
Change subject: soc/intel/apollolake: LZ4 Compress FSP-M ......................................................................
Patch Set 1: Code-Review+1
Hmm, Picasso is using LZMA. Unsure how Furquan decided on that vs. LZ4 in cb:41830.
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48158 )
Change subject: soc/intel/apollolake: LZ4 Compress FSP-M ......................................................................
Patch Set 1:
Patch Set 1: Code-Review+1
Hmm, Picasso is using LZMA. Unsure how Furquan decided on that vs. LZ4 in cb:41830.
In resource constrained environments (so pre-RAM environments) LZ4 is somewhat safer as the stack usage is quite limited. If you boot into ram you probably want the highest possible compression ratio without caring about stack usage.
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48158 )
Change subject: soc/intel/apollolake: LZ4 Compress FSP-M ......................................................................
Patch Set 1:
Patch Set 1:
Patch Set 1: Code-Review+1
Hmm, Picasso is using LZMA. Unsure how Furquan decided on that vs. LZ4 in cb:41830.
In resource constrained environments (so pre-RAM environments) LZ4 is somewhat safer as the stack usage is quite limited. If you boot into ram you probably want the highest possible compression ratio without caring about stack usage.
As mentioned in the commit message on CB:41830, I did it primarily based on the size of the compressed binary for Picasso.
Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48158 )
Change subject: soc/intel/apollolake: LZ4 Compress FSP-M ......................................................................
Patch Set 2:
Patch Set 1:
Patch Set 1:
Patch Set 1: Code-Review+1
Hmm, Picasso is using LZMA. Unsure how Furquan decided on that vs. LZ4 in cb:41830.
In resource constrained environments (so pre-RAM environments) LZ4 is somewhat safer as the stack usage is quite limited. If you boot into ram you probably want the highest possible compression ratio without caring about stack usage.
As mentioned in the commit message on CB:41830, I did it primarily based on the size of the compressed binary for Picasso.
Ah thanks, that was very good.
Attention is currently required from: Arthur Heymans. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48158 )
Change subject: soc/intel/apollolake: LZ4 Compress FSP-M ......................................................................
Patch Set 2: Code-Review+1
Attention is currently required from: Arthur Heymans. Sean Rhodes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48158 )
Change subject: soc/intel/apollolake: LZ4 Compress FSP-M ......................................................................
Patch Set 2: Code-Review+1
Attention is currently required from: Arthur Heymans. Sean Rhodes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48158 )
Change subject: soc/intel/apollolake: LZ4 Compress FSP-M ......................................................................
Patch Set 2: Code-Review+2
Hello build bot (Jenkins), Marshall Dawson, Paul Menzel, Andrey Petrov, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/48158
to look at the new patch set (#3).
Change subject: soc/intel/apollolake: LZ4 Compress FSP-M ......................................................................
soc/intel/apollolake: LZ4 Compress FSP-M
FSP-M is not run XIP so it can be compressed. This more than halves the binary size. 364544 bytes -> 168616 bytes.
On the up/squared this also results in a 83ms speedup.
TESTED: up/squared boots.
Change-Id: Ic76b51f0f3007b59ccb9f76b6a57bb9265dab833 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/soc/intel/apollolake/Kconfig 1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/48158/3
Attention is currently required from: Arthur Heymans. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48158 )
Change subject: soc/intel/apollolake: LZ4 Compress FSP-M ......................................................................
Patch Set 3: Code-Review+1
Hello build bot (Jenkins), Marshall Dawson, Paul Menzel, Angel Pons, Andrey Petrov, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/48158
to look at the new patch set (#6).
Change subject: soc/intel/apollolake: LZ4 Compress FSP-M ......................................................................
soc/intel/apollolake: LZ4 Compress FSP-M
FSP-M is not run XIP so it can be compressed. This more than halves the binary size. 364544 bytes -> 168616 bytes.
On the up/squared this also results in a 83ms speedup.
TESTED: up/squared boots.
Change-Id: Ic76b51f0f3007b59ccb9f76b6a57bb9265dab833 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/soc/intel/apollolake/Kconfig 1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/48158/6
Paul Fagerburg has submitted this change. ( https://review.coreboot.org/c/coreboot/+/48158 )
Change subject: soc/intel/apollolake: LZ4 Compress FSP-M ......................................................................
soc/intel/apollolake: LZ4 Compress FSP-M
FSP-M is not run XIP so it can be compressed. This more than halves the binary size. 364544 bytes -> 168616 bytes.
On the up/squared this also results in a 83ms speedup.
TESTED: up/squared boots.
Change-Id: Ic76b51f0f3007b59ccb9f76b6a57bb9265dab833 Signed-off-by: Arthur Heymans arthur@aheymans.xyz Reviewed-on: https://review.coreboot.org/c/coreboot/+/48158 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com Reviewed-by: Sean Rhodes sean@starlabs.systems --- M src/soc/intel/apollolake/Kconfig 1 file changed, 22 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, but someone else must approve Sean Rhodes: Looks good to me, approved
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig index c63f4fd..36bc631 100644 --- a/src/soc/intel/apollolake/Kconfig +++ b/src/soc/intel/apollolake/Kconfig @@ -56,6 +56,7 @@ select NO_PM_ACPI_TIMER select NO_UART_ON_SUPERIO select NO_XIP_EARLY_STAGES + select FSP_COMPRESS_FSP_M_LZ4 select PARALLEL_MP_AP_WORK select PCIEXP_ASPM select PCIEXP_COMMON_CLOCK
Matt DeVillier has created a revert of this change. ( https://review.coreboot.org/c/coreboot/+/48158 )
Change subject: soc/intel/apollolake: LZ4 Compress FSP-M ......................................................................