Change in coreboot[master]: soc/intel/ehl/fsp_params: Set Intel Speed Step (Eist) from devicetree

[Uwe Poeche (Code Review)]

Attention is currently required from: Uwe Poeche, Werner Zeh.
Hello build bot (Jenkins), Werner Zeh,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/63352

to look at the new patch set (#3).

Change subject: soc/intel/ehl/fsp_params: Set Intel Speed Step (Eist) from devicetree
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soc/intel/ehl/fsp_params: Set Intel Speed Step (Eist) from devicetree

This patch provides the set value for intel speed step in devicetree
for FSPS. Before that in case of not set value in device tree the
default value of disabled was overwritten by default enabled of FSP.

Test: mainboard/siemens/mc_ehl/variants/mc_ehl1
Check status of Bit 16 in MSR 0x1a0 after boot.

Change-Id: I0a5ef4968a27978116c21ce35b3818c6b36e086f
Signed-off-by: Uwe Poeche 
---
M src/soc/intel/elkhartlake/fsp_params.c
1 file changed, 3 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/63352/3