Attention is currently required from: Ravi kumar, Paul Menzel. Shelley Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54352 )
Change subject: soc/qualcomm/sc7280: DDR One-Time-Training Support ......................................................................
Patch Set 19:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/54352/comment/8918876f_b286ad52 PS16, Line 10:
Please elaborate, why changing FMAP is enough.
Yes, more detail would be great. Can you comment on: 1. Why we need to bump up from 8k to 32k? 2. Why qclib size increase? Are you depending upon another version of qclib? If so, can you please reference it in the comments? 3. Why do you need to reorganize the memlayout? Is it because of the above size increases?