Martin Roth has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/52763 )
Change subject: soc/amd/common: Add placeholder GPIO macro, PAD_UNCHANGED ......................................................................
soc/amd/common: Add placeholder GPIO macro, PAD_UNCHANGED
GPIOs can only be updated in gpio_configure_pads_with_override() if they are present in the base table. If they are not there, the override does not work. This allows them to be in the base table so that they can be overridden without changing the existing configuration.
BUG=b:172848722 TEST=Build & Boot
Signed-off-by: Martin Roth martinroth@chromium.org Change-Id: I7e5e7b7d30f2c89fa1db375ddba394e6914d97b9 --- M src/soc/amd/common/block/gpio_banks/gpio.c M src/soc/amd/common/block/include/amdblocks/gpio_defs.h 2 files changed, 14 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/52763/1
diff --git a/src/soc/amd/common/block/gpio_banks/gpio.c b/src/soc/amd/common/block/gpio_banks/gpio.c index 711b779..9768103 100644 --- a/src/soc/amd/common/block/gpio_banks/gpio.c +++ b/src/soc/amd/common/block/gpio_banks/gpio.c @@ -168,6 +168,9 @@ const bool can_set_smi_flags = !(CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK) && ENV_SEPARATE_VERSTAGE);
+ if (g->function == GPIO_NO_CHANGE) + return; + iomux_write8(g->gpio, g->function & AMD_GPIO_MUX_MASK); iomux_read8(g->gpio); /* Flush posted write */
diff --git a/src/soc/amd/common/block/include/amdblocks/gpio_defs.h b/src/soc/amd/common/block/include/amdblocks/gpio_defs.h index 4b25c31..708273d 100644 --- a/src/soc/amd/common/block/include/amdblocks/gpio_defs.h +++ b/src/soc/amd/common/block/include/amdblocks/gpio_defs.h @@ -77,6 +77,8 @@
#define AMD_GPIO_MUX_MASK 0x03
+#define GPIO_NO_CHANGE 0xff + /* * Flags used for GPIO configuration. These provide additional information that does not go * directly into GPIO control register. These are stored in `flags` field in soc_amd_gpio. @@ -171,7 +173,7 @@ * PAD_SMI The pin is a SMI source * pin the pin to be programmed * pull pull up, pull down or no pull - * event trigger LEVEL_LOW, LEVEL_HIGH + * event trigger LEVEL_LOW, LEVEL_HIGH * PAD_NF_SCI Define native alternate function and confiure SCI source * pin the pin to be programmed * function the native function @@ -187,6 +189,10 @@ * pull pull up, pull down or no pull * debounce_type preserve low glitch, preserve high glitch, no glitch * debounce_time the debounce time + * PAD_NC No connect - The pin is a GPIO input, pulled down + * pin the pin to be programmed + * PAD_UNCHANGED Do not change the pin's current configuration + * pin the pin to be programmed */
#define PAD_CFG_STRUCT_FLAGS(__pin, __function, __control, __flags) \ @@ -263,6 +269,10 @@ #define PAD_NC(pin) \ PAD_CFG_STRUCT(pin, pin ## _IOMUX_GPIOxx, PAD_PULL(PULL_DOWN))
+/* Placeholder pad configuration */ +#define PAD_UNCHANGED(pin) \ + PAD_CFG_STRUCT(pin, GPIO_NO_CHANGE, 0, 0) + #define GEVENT_0 0 #define GEVENT_1 1 #define GEVENT_2 2