Change in coreboot[master]: {nb,soc}/intel: Use get_current_microcode_rev() for ucode version
Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44175 )
Change subject: {nb,soc}/intel: Use get_current_microcode_rev() for ucode version ......................................................................
{nb,soc}/intel: Use get_current_microcode_rev() for ucode version
This patch removes all redundant read microcode version implementation from SoC directory and refer from cpu/intel/microcode/microcode.c file.
TEST=Able to get correct microcode version.
Change-Id: Icb905b18d85f1c5b68fac6905f3c65e95bffa2da Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/northbridge/intel/haswell/report_platform.c M src/soc/intel/apollolake/report_platform.c M src/soc/intel/broadwell/romstage/report_platform.c M src/soc/intel/cannonlake/bootblock/report_platform.c M src/soc/intel/icelake/bootblock/report_platform.c M src/soc/intel/jasperlake/bootblock/report_platform.c M src/soc/intel/skylake/bootblock/report_platform.c M src/soc/intel/tigerlake/bootblock/report_platform.c 8 files changed, 17 insertions(+), 58 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/44175/1
diff --git a/src/northbridge/intel/haswell/report_platform.c b/src/northbridge/intel/haswell/report_platform.c index 8ea4175..8c1b987 100644 --- a/src/northbridge/intel/haswell/report_platform.c +++ b/src/northbridge/intel/haswell/report_platform.c @@ -2,6 +2,7 @@
#include <console/console.h> #include <arch/cpu.h> +#include <cpu/intel/microcode.h> #include <string.h> #include <southbridge/intel/lynxpoint/pch.h> #include <device/pci_ops.h> @@ -14,7 +15,6 @@ u32 i, index, cpu_id, cpu_feature_flag; char cpu_string[50], *cpu_name = cpu_string; /* 48 bytes are reported */ int vt, txt, aes; - msr_t microcode_ver; const char *mode[] = {"NOT ", ""};
index = 0x80000000; @@ -35,13 +35,9 @@ while (cpu_name[0] == ' ') cpu_name++;
- microcode_ver.lo = 0; - microcode_ver.hi = 0; - wrmsr(IA32_BIOS_SIGN_ID, microcode_ver); cpu_id = cpu_get_cpuid(); - microcode_ver = rdmsr(IA32_BIOS_SIGN_ID); printk(BIOS_DEBUG, "CPU id(%x) ucode:%08x %s\n", cpu_id, - microcode_ver.hi, cpu_name); + get_current_microcode_rev(), cpu_name);
cpu_feature_flag = cpu_get_feature_flags_ecx(); aes = (cpu_feature_flag & CPUID_AES) ? 1 : 0; diff --git a/src/soc/intel/apollolake/report_platform.c b/src/soc/intel/apollolake/report_platform.c index a7b5873..e79e28a 100644 --- a/src/soc/intel/apollolake/report_platform.c +++ b/src/soc/intel/apollolake/report_platform.c @@ -3,6 +3,7 @@ #include <arch/cpu.h> #include <device/pci_ops.h> #include <console/console.h> +#include <cpu/intel/microcode.h> #include <cpu/x86/msr.h> #include <cpu/x86/name.h> #include <device/pci.h> @@ -64,18 +65,12 @@ { uint32_t i, cpu_id, cpu_feature_flag; char cpu_name[49]; - msr_t microcode_ver; const char *support = "Supported"; const char *no_support = "Not Supported"; const char *cpu_type = "Unknown";
fill_processor_name(cpu_name); - - microcode_ver.lo = 0; - microcode_ver.hi = 0; - wrmsr(IA32_BIOS_SIGN_ID, microcode_ver); cpu_id = cpu_get_cpuid(); - microcode_ver = rdmsr(IA32_BIOS_SIGN_ID);
/* Look for string to match the name */ for (i = 0; i < ARRAY_SIZE(cpu_table); i++) { @@ -86,7 +81,8 @@ }
printk(BIOS_INFO, "CPU: %s\n", cpu_name); - printk(BIOS_INFO, "CPU: ID %x, %s, ucode: %08x\n", cpu_id, cpu_type, microcode_ver.hi); + printk(BIOS_INFO, "CPU: ID %x, %s, ucode: %08x\n", cpu_id, cpu_type, + get_current_microcode_rev());
cpu_feature_flag = cpu_get_feature_flags_ecx(); printk(BIOS_INFO, "CPU: AES %s, TXT %s, VT %s\n", diff --git a/src/soc/intel/broadwell/romstage/report_platform.c b/src/soc/intel/broadwell/romstage/report_platform.c index 1029395..3d122fc 100644 --- a/src/soc/intel/broadwell/romstage/report_platform.c +++ b/src/soc/intel/broadwell/romstage/report_platform.c @@ -5,6 +5,7 @@ #include <console/console.h> #include <device/pci.h> #include <string.h> +#include <cpu/intel/microcode.h> #include <cpu/x86/msr.h> #include <soc/cpu.h> #include <soc/pch.h> @@ -98,11 +99,7 @@ while (cpu_name[0] == ' ') cpu_name++;
- microcode_ver.lo = 0; - microcode_ver.hi = 0; - wrmsr(IA32_BIOS_SIGN_ID, microcode_ver); cpu_id = cpu_get_cpuid(); - microcode_ver = rdmsr(IA32_BIOS_SIGN_ID);
/* Look for string to match the name */ for (i = 0; i < ARRAY_SIZE(cpu_table); i++) { @@ -114,7 +111,7 @@
printk(BIOS_DEBUG, "CPU: %s\n", cpu_name); printk(BIOS_DEBUG, "CPU: ID %x, %s, ucode: %08x\n", - cpu_id, cpu_type, microcode_ver.hi); + cpu_id, cpu_type, get_current_microcode_rev());
cpu_feature_flag = cpu_get_feature_flags_ecx(); aes = (cpu_feature_flag & CPUID_AES) ? 1 : 0; diff --git a/src/soc/intel/cannonlake/bootblock/report_platform.c b/src/soc/intel/cannonlake/bootblock/report_platform.c index b29cf7d..87b4be7 100644 --- a/src/soc/intel/cannonlake/bootblock/report_platform.c +++ b/src/soc/intel/cannonlake/bootblock/report_platform.c @@ -3,6 +3,7 @@ #include <arch/cpu.h> #include <device/pci_ops.h> #include <console/console.h> +#include <cpu/intel/microcode.h> #include <cpu/x86/msr.h> #include <cpu/x86/name.h> #include <device/pci.h> @@ -12,8 +13,6 @@ #include <soc/pch.h> #include <soc/pci_devs.h>
-#define BIOS_SIGN_ID 0x8B - static struct { u32 cpuid; const char *name; @@ -170,17 +169,11 @@ u32 i, cpu_id, cpu_feature_flag; char cpu_name[49]; int vt, txt, aes; - msr_t microcode_ver; static const char *const mode[] = {"NOT ", ""}; const char *cpu_type = "Unknown";
fill_processor_name(cpu_name); - - microcode_ver.lo = 0; - microcode_ver.hi = 0; - wrmsr(BIOS_SIGN_ID, microcode_ver); cpu_id = cpu_get_cpuid(); - microcode_ver = rdmsr(BIOS_SIGN_ID);
/* Look for string to match the name */ for (i = 0; i < ARRAY_SIZE(cpu_table); i++) { @@ -192,7 +185,7 @@
printk(BIOS_DEBUG, "CPU: %s\n", cpu_name); printk(BIOS_DEBUG, "CPU: ID %x, %s, ucode: %08x\n", - cpu_id, cpu_type, microcode_ver.hi); + cpu_id, cpu_type, get_current_microcode_rev());
cpu_feature_flag = cpu_get_feature_flags_ecx(); aes = (cpu_feature_flag & CPUID_AES) ? 1 : 0; diff --git a/src/soc/intel/icelake/bootblock/report_platform.c b/src/soc/intel/icelake/bootblock/report_platform.c index f001e3b..898b0e3 100644 --- a/src/soc/intel/icelake/bootblock/report_platform.c +++ b/src/soc/intel/icelake/bootblock/report_platform.c @@ -3,6 +3,7 @@ #include <arch/cpu.h> #include <device/pci_ops.h> #include <console/console.h> +#include <cpu/intel/microcode.h> #include <cpu/x86/msr.h> #include <device/pci.h> #include <device/pci_ids.h> @@ -12,8 +13,6 @@ #include <soc/pci_devs.h> #include <string.h>
-#define BIOS_SIGN_ID 0x8B - static struct { u32 cpuid; const char *name; @@ -83,7 +82,6 @@ const char cpu_not_found[] = "Platform info not available"; const char *cpu_name = cpu_not_found; /* 48 bytes are reported */ int vt, txt, aes; - msr_t microcode_ver; static const char *const mode[] = {"NOT ", ""}; const char *cpu_type = "Unknown"; u32 p[13]; @@ -108,11 +106,7 @@ cpu_name++; }
- microcode_ver.lo = 0; - microcode_ver.hi = 0; - wrmsr(BIOS_SIGN_ID, microcode_ver); cpu_id = cpu_get_cpuid(); - microcode_ver = rdmsr(BIOS_SIGN_ID);
/* Look for string to match the name */ for (i = 0; i < ARRAY_SIZE(cpu_table); i++) { @@ -124,7 +118,7 @@
printk(BIOS_DEBUG, "CPU: %s\n", cpu_name); printk(BIOS_DEBUG, "CPU: ID %x, %s, ucode: %08x\n", - cpu_id, cpu_type, microcode_ver.hi); + cpu_id, cpu_type, get_current_microcode_rev());
cpu_feature_flag = cpu_get_feature_flags_ecx(); aes = (cpu_feature_flag & CPUID_AES) ? 1 : 0; diff --git a/src/soc/intel/jasperlake/bootblock/report_platform.c b/src/soc/intel/jasperlake/bootblock/report_platform.c index 10d7b0d..a907099 100644 --- a/src/soc/intel/jasperlake/bootblock/report_platform.c +++ b/src/soc/intel/jasperlake/bootblock/report_platform.c @@ -3,6 +3,7 @@ #include <arch/cpu.h> #include <device/pci_ops.h> #include <console/console.h> +#include <cpu/intel/microcode.h> #include <cpu/x86/msr.h> #include <cpu/x86/name.h> #include <device/pci.h> @@ -13,8 +14,6 @@ #include <soc/pci_devs.h> #include <string.h>
-#define BIOS_SIGN_ID 0x8B - static struct { u32 cpuid; const char *name; @@ -67,12 +66,7 @@ const char *cpu_type = "Unknown";
fill_processor_name(cpu_name); - - microcode_ver.lo = 0; - microcode_ver.hi = 0; - wrmsr(BIOS_SIGN_ID, microcode_ver); cpu_id = cpu_get_cpuid(); - microcode_ver = rdmsr(BIOS_SIGN_ID);
/* Look for string to match the name */ for (i = 0; i < ARRAY_SIZE(cpu_table); i++) { @@ -84,7 +78,7 @@
printk(BIOS_DEBUG, "CPU: %s\n", cpu_name); printk(BIOS_DEBUG, "CPU: ID %x, %s, ucode: %08x\n", - cpu_id, cpu_type, microcode_ver.hi); + cpu_id, cpu_type, get_current_microcode_rev());
cpu_feature_flag = cpu_get_feature_flags_ecx(); aes = (cpu_feature_flag & CPUID_AES) ? 1 : 0; diff --git a/src/soc/intel/skylake/bootblock/report_platform.c b/src/soc/intel/skylake/bootblock/report_platform.c index d306879..957b4c2 100644 --- a/src/soc/intel/skylake/bootblock/report_platform.c +++ b/src/soc/intel/skylake/bootblock/report_platform.c @@ -3,6 +3,7 @@ #include <arch/cpu.h> #include <device/pci_ops.h> #include <console/console.h> +#include <cpu/intel/microcode.h> #include <cpu/x86/msr.h> #include <cpu/x86/name.h> #include <device/pci.h> @@ -153,17 +154,11 @@ u32 i, cpu_id, cpu_feature_flag; char cpu_name[49]; int vt, txt, aes; - msr_t microcode_ver; static const char *const mode[] = {"NOT ", ""}; const char *cpu_type = "Unknown";
fill_processor_name(cpu_name); - - microcode_ver.lo = 0; - microcode_ver.hi = 0; - wrmsr(IA32_BIOS_SIGN_ID, microcode_ver); cpu_id = cpu_get_cpuid(); - microcode_ver = rdmsr(IA32_BIOS_SIGN_ID);
/* Look for string to match the name */ for (i = 0; i < ARRAY_SIZE(cpu_table); i++) { @@ -175,7 +170,7 @@
printk(BIOS_DEBUG, "CPU: %s\n", cpu_name); printk(BIOS_DEBUG, "CPU: ID %x, %s, ucode: %08x\n", - cpu_id, cpu_type, microcode_ver.hi); + cpu_id, cpu_type, get_current_microcode_rev());
cpu_feature_flag = cpu_get_feature_flags_ecx(); aes = (cpu_feature_flag & CPUID_AES) ? 1 : 0; diff --git a/src/soc/intel/tigerlake/bootblock/report_platform.c b/src/soc/intel/tigerlake/bootblock/report_platform.c index 6acc0c3..03d65a4 100644 --- a/src/soc/intel/tigerlake/bootblock/report_platform.c +++ b/src/soc/intel/tigerlake/bootblock/report_platform.c @@ -9,6 +9,7 @@ #include <arch/cpu.h> #include <device/pci_ops.h> #include <console/console.h> +#include <cpu/intel/microcode.h> #include <cpu/x86/msr.h> #include <device/pci.h> #include <device/pci_ids.h> @@ -18,8 +19,6 @@ #include <soc/pci_devs.h> #include <string.h>
-#define BIOS_SIGN_ID 0x8B - static struct { u32 cpuid; const char *name; @@ -104,7 +103,6 @@ const char cpu_not_found[] = "Platform info not available"; const char *cpu_name = cpu_not_found; /* 48 bytes are reported */ int vt, txt, aes; - msr_t microcode_ver; static const char *const mode[] = {"NOT ", ""}; const char *cpu_type = "Unknown"; u32 p[13]; @@ -129,11 +127,7 @@ cpu_name++; }
- microcode_ver.lo = 0; - microcode_ver.hi = 0; - wrmsr(BIOS_SIGN_ID, microcode_ver); cpu_id = cpu_get_cpuid(); - microcode_ver = rdmsr(BIOS_SIGN_ID);
/* Look for string to match the name */ for (i = 0; i < ARRAY_SIZE(cpu_table); i++) { @@ -145,7 +139,7 @@
printk(BIOS_DEBUG, "CPU: %s\n", cpu_name); printk(BIOS_DEBUG, "CPU: ID %x, %s, ucode: %08x\n", - cpu_id, cpu_type, microcode_ver.hi); + cpu_id, cpu_type, get_current_microcode_rev());
cpu_feature_flag = cpu_get_feature_flags_ecx(); aes = (cpu_feature_flag & CPUID_AES) ? 1 : 0;
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44175 )
Change subject: {nb,soc}/intel: Use get_current_microcode_rev() for ucode version ......................................................................
Patch Set 1: Code-Review+2
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44175 )
Change subject: {nb,soc}/intel: Use get_current_microcode_rev() for ucode version ......................................................................
Patch Set 1: Code-Review+2
Hello build bot (Jenkins), Angel Pons, Arthur Heymans, Andrey Petrov, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44175
to look at the new patch set (#2).
Change subject: {nb,soc}/intel: Use get_current_microcode_rev() for ucode version ......................................................................
{nb,soc}/intel: Use get_current_microcode_rev() for ucode version
This patch removes all redundant read microcode version implementation from SoC directory and refer from cpu/intel/microcode/microcode.c file.
TEST=Able to get correct microcode version.
Change-Id: Icb905b18d85f1c5b68fac6905f3c65e95bffa2da Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/northbridge/intel/haswell/report_platform.c M src/soc/intel/apollolake/report_platform.c M src/soc/intel/broadwell/romstage/report_platform.c M src/soc/intel/cannonlake/bootblock/report_platform.c M src/soc/intel/icelake/bootblock/report_platform.c M src/soc/intel/jasperlake/bootblock/report_platform.c M src/soc/intel/skylake/bootblock/report_platform.c M src/soc/intel/tigerlake/bootblock/report_platform.c 8 files changed, 17 insertions(+), 60 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/44175/2
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44175 )
Change subject: {nb,soc}/intel: Use get_current_microcode_rev() for ucode version ......................................................................
Patch Set 2:
@Arthur/Angel, my bad, i have missed to remove unused variable 😞
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44175 )
Change subject: {nb,soc}/intel: Use get_current_microcode_rev() for ucode version ......................................................................
Patch Set 2: Code-Review+2
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44175 )
Change subject: {nb,soc}/intel: Use get_current_microcode_rev() for ucode version ......................................................................
Patch Set 2: Code-Review+2
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44175 )
Change subject: {nb,soc}/intel: Use get_current_microcode_rev() for ucode version ......................................................................
Patch Set 2:
Patch Set 2:
@Arthur/Angel, my bad, i have missed to remove unused variable 😞
Thanks Arthur, Angel
Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/44175 )
Change subject: {nb,soc}/intel: Use get_current_microcode_rev() for ucode version ......................................................................
{nb,soc}/intel: Use get_current_microcode_rev() for ucode version
This patch removes all redundant read microcode version implementation from SoC directory and refer from cpu/intel/microcode/microcode.c file.
TEST=Able to get correct microcode version.
Change-Id: Icb905b18d85f1c5b68fac6905f3c65e95bffa2da Signed-off-by: Subrata Banik subrata.banik@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/44175 Reviewed-by: Arthur Heymans arthur@aheymans.xyz Reviewed-by: Angel Pons th3fanbus@gmail.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/northbridge/intel/haswell/report_platform.c M src/soc/intel/apollolake/report_platform.c M src/soc/intel/broadwell/romstage/report_platform.c M src/soc/intel/cannonlake/bootblock/report_platform.c M src/soc/intel/icelake/bootblock/report_platform.c M src/soc/intel/jasperlake/bootblock/report_platform.c M src/soc/intel/skylake/bootblock/report_platform.c M src/soc/intel/tigerlake/bootblock/report_platform.c 8 files changed, 17 insertions(+), 60 deletions(-)
Approvals: build bot (Jenkins): Verified Arthur Heymans: Looks good to me, approved Angel Pons: Looks good to me, approved
diff --git a/src/northbridge/intel/haswell/report_platform.c b/src/northbridge/intel/haswell/report_platform.c index 8ea4175..8c1b987 100644 --- a/src/northbridge/intel/haswell/report_platform.c +++ b/src/northbridge/intel/haswell/report_platform.c @@ -2,6 +2,7 @@
#include <console/console.h> #include <arch/cpu.h> +#include <cpu/intel/microcode.h> #include <string.h> #include <southbridge/intel/lynxpoint/pch.h> #include <device/pci_ops.h> @@ -14,7 +15,6 @@ u32 i, index, cpu_id, cpu_feature_flag; char cpu_string[50], *cpu_name = cpu_string; /* 48 bytes are reported */ int vt, txt, aes; - msr_t microcode_ver; const char *mode[] = {"NOT ", ""};
index = 0x80000000; @@ -35,13 +35,9 @@ while (cpu_name[0] == ' ') cpu_name++;
- microcode_ver.lo = 0; - microcode_ver.hi = 0; - wrmsr(IA32_BIOS_SIGN_ID, microcode_ver); cpu_id = cpu_get_cpuid(); - microcode_ver = rdmsr(IA32_BIOS_SIGN_ID); printk(BIOS_DEBUG, "CPU id(%x) ucode:%08x %s\n", cpu_id, - microcode_ver.hi, cpu_name); + get_current_microcode_rev(), cpu_name);
cpu_feature_flag = cpu_get_feature_flags_ecx(); aes = (cpu_feature_flag & CPUID_AES) ? 1 : 0; diff --git a/src/soc/intel/apollolake/report_platform.c b/src/soc/intel/apollolake/report_platform.c index a7b5873..e79e28a 100644 --- a/src/soc/intel/apollolake/report_platform.c +++ b/src/soc/intel/apollolake/report_platform.c @@ -3,6 +3,7 @@ #include <arch/cpu.h> #include <device/pci_ops.h> #include <console/console.h> +#include <cpu/intel/microcode.h> #include <cpu/x86/msr.h> #include <cpu/x86/name.h> #include <device/pci.h> @@ -64,18 +65,12 @@ { uint32_t i, cpu_id, cpu_feature_flag; char cpu_name[49]; - msr_t microcode_ver; const char *support = "Supported"; const char *no_support = "Not Supported"; const char *cpu_type = "Unknown";
fill_processor_name(cpu_name); - - microcode_ver.lo = 0; - microcode_ver.hi = 0; - wrmsr(IA32_BIOS_SIGN_ID, microcode_ver); cpu_id = cpu_get_cpuid(); - microcode_ver = rdmsr(IA32_BIOS_SIGN_ID);
/* Look for string to match the name */ for (i = 0; i < ARRAY_SIZE(cpu_table); i++) { @@ -86,7 +81,8 @@ }
printk(BIOS_INFO, "CPU: %s\n", cpu_name); - printk(BIOS_INFO, "CPU: ID %x, %s, ucode: %08x\n", cpu_id, cpu_type, microcode_ver.hi); + printk(BIOS_INFO, "CPU: ID %x, %s, ucode: %08x\n", cpu_id, cpu_type, + get_current_microcode_rev());
cpu_feature_flag = cpu_get_feature_flags_ecx(); printk(BIOS_INFO, "CPU: AES %s, TXT %s, VT %s\n", diff --git a/src/soc/intel/broadwell/romstage/report_platform.c b/src/soc/intel/broadwell/romstage/report_platform.c index 1029395..938f3eb 100644 --- a/src/soc/intel/broadwell/romstage/report_platform.c +++ b/src/soc/intel/broadwell/romstage/report_platform.c @@ -5,6 +5,7 @@ #include <console/console.h> #include <device/pci.h> #include <string.h> +#include <cpu/intel/microcode.h> #include <cpu/x86/msr.h> #include <soc/cpu.h> #include <soc/pch.h> @@ -76,7 +77,6 @@ u32 i, index, cpu_id, cpu_feature_flag; char cpu_string[50], *cpu_name = cpu_string; /* 48 bytes are reported */ int vt, txt, aes; - msr_t microcode_ver; const char *mode[] = {"NOT ", ""}; const char *cpu_type = "Unknown";
@@ -98,11 +98,7 @@ while (cpu_name[0] == ' ') cpu_name++;
- microcode_ver.lo = 0; - microcode_ver.hi = 0; - wrmsr(IA32_BIOS_SIGN_ID, microcode_ver); cpu_id = cpu_get_cpuid(); - microcode_ver = rdmsr(IA32_BIOS_SIGN_ID);
/* Look for string to match the name */ for (i = 0; i < ARRAY_SIZE(cpu_table); i++) { @@ -114,7 +110,7 @@
printk(BIOS_DEBUG, "CPU: %s\n", cpu_name); printk(BIOS_DEBUG, "CPU: ID %x, %s, ucode: %08x\n", - cpu_id, cpu_type, microcode_ver.hi); + cpu_id, cpu_type, get_current_microcode_rev());
cpu_feature_flag = cpu_get_feature_flags_ecx(); aes = (cpu_feature_flag & CPUID_AES) ? 1 : 0; diff --git a/src/soc/intel/cannonlake/bootblock/report_platform.c b/src/soc/intel/cannonlake/bootblock/report_platform.c index b29cf7d..87b4be7 100644 --- a/src/soc/intel/cannonlake/bootblock/report_platform.c +++ b/src/soc/intel/cannonlake/bootblock/report_platform.c @@ -3,6 +3,7 @@ #include <arch/cpu.h> #include <device/pci_ops.h> #include <console/console.h> +#include <cpu/intel/microcode.h> #include <cpu/x86/msr.h> #include <cpu/x86/name.h> #include <device/pci.h> @@ -12,8 +13,6 @@ #include <soc/pch.h> #include <soc/pci_devs.h>
-#define BIOS_SIGN_ID 0x8B - static struct { u32 cpuid; const char *name; @@ -170,17 +169,11 @@ u32 i, cpu_id, cpu_feature_flag; char cpu_name[49]; int vt, txt, aes; - msr_t microcode_ver; static const char *const mode[] = {"NOT ", ""}; const char *cpu_type = "Unknown";
fill_processor_name(cpu_name); - - microcode_ver.lo = 0; - microcode_ver.hi = 0; - wrmsr(BIOS_SIGN_ID, microcode_ver); cpu_id = cpu_get_cpuid(); - microcode_ver = rdmsr(BIOS_SIGN_ID);
/* Look for string to match the name */ for (i = 0; i < ARRAY_SIZE(cpu_table); i++) { @@ -192,7 +185,7 @@
printk(BIOS_DEBUG, "CPU: %s\n", cpu_name); printk(BIOS_DEBUG, "CPU: ID %x, %s, ucode: %08x\n", - cpu_id, cpu_type, microcode_ver.hi); + cpu_id, cpu_type, get_current_microcode_rev());
cpu_feature_flag = cpu_get_feature_flags_ecx(); aes = (cpu_feature_flag & CPUID_AES) ? 1 : 0; diff --git a/src/soc/intel/icelake/bootblock/report_platform.c b/src/soc/intel/icelake/bootblock/report_platform.c index f001e3b..898b0e3 100644 --- a/src/soc/intel/icelake/bootblock/report_platform.c +++ b/src/soc/intel/icelake/bootblock/report_platform.c @@ -3,6 +3,7 @@ #include <arch/cpu.h> #include <device/pci_ops.h> #include <console/console.h> +#include <cpu/intel/microcode.h> #include <cpu/x86/msr.h> #include <device/pci.h> #include <device/pci_ids.h> @@ -12,8 +13,6 @@ #include <soc/pci_devs.h> #include <string.h>
-#define BIOS_SIGN_ID 0x8B - static struct { u32 cpuid; const char *name; @@ -83,7 +82,6 @@ const char cpu_not_found[] = "Platform info not available"; const char *cpu_name = cpu_not_found; /* 48 bytes are reported */ int vt, txt, aes; - msr_t microcode_ver; static const char *const mode[] = {"NOT ", ""}; const char *cpu_type = "Unknown"; u32 p[13]; @@ -108,11 +106,7 @@ cpu_name++; }
- microcode_ver.lo = 0; - microcode_ver.hi = 0; - wrmsr(BIOS_SIGN_ID, microcode_ver); cpu_id = cpu_get_cpuid(); - microcode_ver = rdmsr(BIOS_SIGN_ID);
/* Look for string to match the name */ for (i = 0; i < ARRAY_SIZE(cpu_table); i++) { @@ -124,7 +118,7 @@
printk(BIOS_DEBUG, "CPU: %s\n", cpu_name); printk(BIOS_DEBUG, "CPU: ID %x, %s, ucode: %08x\n", - cpu_id, cpu_type, microcode_ver.hi); + cpu_id, cpu_type, get_current_microcode_rev());
cpu_feature_flag = cpu_get_feature_flags_ecx(); aes = (cpu_feature_flag & CPUID_AES) ? 1 : 0; diff --git a/src/soc/intel/jasperlake/bootblock/report_platform.c b/src/soc/intel/jasperlake/bootblock/report_platform.c index 10d7b0d..8f1318d 100644 --- a/src/soc/intel/jasperlake/bootblock/report_platform.c +++ b/src/soc/intel/jasperlake/bootblock/report_platform.c @@ -3,6 +3,7 @@ #include <arch/cpu.h> #include <device/pci_ops.h> #include <console/console.h> +#include <cpu/intel/microcode.h> #include <cpu/x86/msr.h> #include <cpu/x86/name.h> #include <device/pci.h> @@ -13,8 +14,6 @@ #include <soc/pci_devs.h> #include <string.h>
-#define BIOS_SIGN_ID 0x8B - static struct { u32 cpuid; const char *name; @@ -62,17 +61,11 @@ u32 i, cpu_id, cpu_feature_flag; char cpu_name[49]; int vt, txt, aes; - msr_t microcode_ver; static const char *const mode[] = {"NOT ", ""}; const char *cpu_type = "Unknown";
fill_processor_name(cpu_name); - - microcode_ver.lo = 0; - microcode_ver.hi = 0; - wrmsr(BIOS_SIGN_ID, microcode_ver); cpu_id = cpu_get_cpuid(); - microcode_ver = rdmsr(BIOS_SIGN_ID);
/* Look for string to match the name */ for (i = 0; i < ARRAY_SIZE(cpu_table); i++) { @@ -84,7 +77,7 @@
printk(BIOS_DEBUG, "CPU: %s\n", cpu_name); printk(BIOS_DEBUG, "CPU: ID %x, %s, ucode: %08x\n", - cpu_id, cpu_type, microcode_ver.hi); + cpu_id, cpu_type, get_current_microcode_rev());
cpu_feature_flag = cpu_get_feature_flags_ecx(); aes = (cpu_feature_flag & CPUID_AES) ? 1 : 0; diff --git a/src/soc/intel/skylake/bootblock/report_platform.c b/src/soc/intel/skylake/bootblock/report_platform.c index d306879..957b4c2 100644 --- a/src/soc/intel/skylake/bootblock/report_platform.c +++ b/src/soc/intel/skylake/bootblock/report_platform.c @@ -3,6 +3,7 @@ #include <arch/cpu.h> #include <device/pci_ops.h> #include <console/console.h> +#include <cpu/intel/microcode.h> #include <cpu/x86/msr.h> #include <cpu/x86/name.h> #include <device/pci.h> @@ -153,17 +154,11 @@ u32 i, cpu_id, cpu_feature_flag; char cpu_name[49]; int vt, txt, aes; - msr_t microcode_ver; static const char *const mode[] = {"NOT ", ""}; const char *cpu_type = "Unknown";
fill_processor_name(cpu_name); - - microcode_ver.lo = 0; - microcode_ver.hi = 0; - wrmsr(IA32_BIOS_SIGN_ID, microcode_ver); cpu_id = cpu_get_cpuid(); - microcode_ver = rdmsr(IA32_BIOS_SIGN_ID);
/* Look for string to match the name */ for (i = 0; i < ARRAY_SIZE(cpu_table); i++) { @@ -175,7 +170,7 @@
printk(BIOS_DEBUG, "CPU: %s\n", cpu_name); printk(BIOS_DEBUG, "CPU: ID %x, %s, ucode: %08x\n", - cpu_id, cpu_type, microcode_ver.hi); + cpu_id, cpu_type, get_current_microcode_rev());
cpu_feature_flag = cpu_get_feature_flags_ecx(); aes = (cpu_feature_flag & CPUID_AES) ? 1 : 0; diff --git a/src/soc/intel/tigerlake/bootblock/report_platform.c b/src/soc/intel/tigerlake/bootblock/report_platform.c index 6acc0c3..03d65a4 100644 --- a/src/soc/intel/tigerlake/bootblock/report_platform.c +++ b/src/soc/intel/tigerlake/bootblock/report_platform.c @@ -9,6 +9,7 @@ #include <arch/cpu.h> #include <device/pci_ops.h> #include <console/console.h> +#include <cpu/intel/microcode.h> #include <cpu/x86/msr.h> #include <device/pci.h> #include <device/pci_ids.h> @@ -18,8 +19,6 @@ #include <soc/pci_devs.h> #include <string.h>
-#define BIOS_SIGN_ID 0x8B - static struct { u32 cpuid; const char *name; @@ -104,7 +103,6 @@ const char cpu_not_found[] = "Platform info not available"; const char *cpu_name = cpu_not_found; /* 48 bytes are reported */ int vt, txt, aes; - msr_t microcode_ver; static const char *const mode[] = {"NOT ", ""}; const char *cpu_type = "Unknown"; u32 p[13]; @@ -129,11 +127,7 @@ cpu_name++; }
- microcode_ver.lo = 0; - microcode_ver.hi = 0; - wrmsr(BIOS_SIGN_ID, microcode_ver); cpu_id = cpu_get_cpuid(); - microcode_ver = rdmsr(BIOS_SIGN_ID);
/* Look for string to match the name */ for (i = 0; i < ARRAY_SIZE(cpu_table); i++) { @@ -145,7 +139,7 @@
printk(BIOS_DEBUG, "CPU: %s\n", cpu_name); printk(BIOS_DEBUG, "CPU: ID %x, %s, ucode: %08x\n", - cpu_id, cpu_type, microcode_ver.hi); + cpu_id, cpu_type, get_current_microcode_rev());
cpu_feature_flag = cpu_get_feature_flags_ecx(); aes = (cpu_feature_flag & CPUID_AES) ? 1 : 0;
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