Jett Rink has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32471
Change subject: arcada: add internal pull to ISH UART RX ......................................................................
arcada: add internal pull to ISH UART RX
We do not want the RX signal to be floating on the board as that could cause the ISH to remain in a higher power state (because there is logic to keep the ISH in an higher power state when there is an active UART).
Add an internal 20K pull up on the RX line. In normal configuration this will burn an additional 544uW.
BRANCH=R75 BUG=b:131241969 TEST=verify that ISH console still works with rework
Change-Id: Ifc9621bcafe4c86edfa9cd6d58b307254d3a81ca Signed-off-by: Jett Rink jettrink@chromium.org --- M src/mainboard/google/sarien/variants/arcada/gpio.c 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/32471/1
diff --git a/src/mainboard/google/sarien/variants/arcada/gpio.c b/src/mainboard/google/sarien/variants/arcada/gpio.c index a88e0b1..da95497 100644 --- a/src/mainboard/google/sarien/variants/arcada/gpio.c +++ b/src/mainboard/google/sarien/variants/arcada/gpio.c @@ -123,7 +123,7 @@ /* ISH_SPI_MISO */ PAD_CFG_GPI(GPP_D11, NONE, DEEP), /* TBT_DET# */ /* ISH_SPI_MOSI */ PAD_NC(GPP_D12, NONE), /* ISH_CPU_UART0_RX */ -/* ISH_UART0_RXD */ PAD_CFG_NF(GPP_D13, NONE, DEEP, NF1), +/* ISH_UART0_RXD */ PAD_CFG_NF(GPP_D13, UP_20K, DEEP, NF1), /* ISH_CPU_UART0_TX */ /* ISH_UART0_TXD */ PAD_CFG_NF(GPP_D14, NONE, DEEP, NF1), /* ISH_UART0_RTS# */ PAD_CFG_GPO(GPP_D15, 1, DEEP), /* WWAN_FULL_PWR_EN */
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32471 )
Change subject: arcada: add internal pull to ISH UART RX ......................................................................
Patch Set 1: Code-Review+2
Duncan Laurie has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32471 )
Change subject: arcada: add internal pull to ISH UART RX ......................................................................
Patch Set 1: Code-Review+2
Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/32471 )
Change subject: arcada: add internal pull to ISH UART RX ......................................................................
arcada: add internal pull to ISH UART RX
We do not want the RX signal to be floating on the board as that could cause the ISH to remain in a higher power state (because there is logic to keep the ISH in an higher power state when there is an active UART).
Add an internal 20K pull up on the RX line. In normal configuration this will burn an additional 544uW.
BRANCH=R75 BUG=b:131241969 TEST=verify that ISH console still works with rework
Change-Id: Ifc9621bcafe4c86edfa9cd6d58b307254d3a81ca Signed-off-by: Jett Rink jettrink@chromium.org Reviewed-on: https://review.coreboot.org/c/coreboot/+/32471 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Furquan Shaikh furquan@google.com Reviewed-by: Duncan Laurie dlaurie@chromium.org --- M src/mainboard/google/sarien/variants/arcada/gpio.c 1 file changed, 1 insertion(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Duncan Laurie: Looks good to me, approved Furquan Shaikh: Looks good to me, approved
diff --git a/src/mainboard/google/sarien/variants/arcada/gpio.c b/src/mainboard/google/sarien/variants/arcada/gpio.c index a88e0b1..da95497 100644 --- a/src/mainboard/google/sarien/variants/arcada/gpio.c +++ b/src/mainboard/google/sarien/variants/arcada/gpio.c @@ -123,7 +123,7 @@ /* ISH_SPI_MISO */ PAD_CFG_GPI(GPP_D11, NONE, DEEP), /* TBT_DET# */ /* ISH_SPI_MOSI */ PAD_NC(GPP_D12, NONE), /* ISH_CPU_UART0_RX */ -/* ISH_UART0_RXD */ PAD_CFG_NF(GPP_D13, NONE, DEEP, NF1), +/* ISH_UART0_RXD */ PAD_CFG_NF(GPP_D13, UP_20K, DEEP, NF1), /* ISH_CPU_UART0_TX */ /* ISH_UART0_TXD */ PAD_CFG_NF(GPP_D14, NONE, DEEP, NF1), /* ISH_UART0_RTS# */ PAD_CFG_GPO(GPP_D15, 1, DEEP), /* WWAN_FULL_PWR_EN */
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Duncan Laurie (Code Review) -
Furquan Shaikh (Code Review)
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Jett Rink (Code Review)
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Patrick Georgi (Code Review)