[S] Change in coreboot[master]: nb/intel/ironlake: Hook up PCI domain and CPU ops to devicetree

[Felix Held (Code Review)]

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/69290 )

(

9 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
 )Change subject: nb/intel/ironlake: Hook up PCI domain and CPU ops to devicetree
......................................................................

nb/intel/ironlake: Hook up PCI domain and CPU ops to devicetree

Change-Id: I9dd254eddc12966154776d8a2d43f002567e758f
Signed-off-by: Arthur Heymans 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69290
Reviewed-by: Angel Pons 
Tested-by: build bot (Jenkins) 
---
M src/mainboard/lenovo/t410/devicetree.cb
M src/mainboard/lenovo/x201/devicetree.cb
M src/mainboard/packardbell/ms2290/devicetree.cb
M src/northbridge/intel/ironlake/northbridge.c
4 files changed, 21 insertions(+), 13 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Angel Pons: Looks good to me, approved

diff --git a/src/mainboard/lenovo/t410/devicetree.cb b/src/mainboard/lenovo/t410/devicetree.cb
index 63f4af2..4631b8e 100644
--- a/src/mainboard/lenovo/t410/devicetree.cb
+++ b/src/mainboard/lenovo/t410/devicetree.cb
@@ -18,12 +18,14 @@
    register "gpu_pch_backlight" = "0x061a061a"

device cpu_cluster 0 on
+		ops ironlake_cpu_bus_ops
    	chip cpu/intel/model_2065x
    		device lapic 0 on end
    	end
    end

device domain 0 on
+		ops ironlake_pci_domain_ops
    	device pci 00.0 on # Host bridge
    		subsystemid 0x17aa 0x2193
    	end
diff --git a/src/mainboard/lenovo/x201/devicetree.cb b/src/mainboard/lenovo/x201/devicetree.cb
index effe4ef..73b0437 100644
--- a/src/mainboard/lenovo/x201/devicetree.cb
+++ b/src/mainboard/lenovo/x201/devicetree.cb
@@ -19,12 +19,14 @@
    register "gpu_pch_backlight" = "0x061a061a"

device cpu_cluster 0 on
+		ops ironlake_cpu_bus_ops
    	chip cpu/intel/model_2065x
    		device lapic 0 on end
    	end
    end

device domain 0 on
+		ops ironlake_pci_domain_ops
    	device pci 00.0 on # Host bridge
    		subsystemid 0x17aa 0x2193
    	end
diff --git a/src/mainboard/packardbell/ms2290/devicetree.cb b/src/mainboard/packardbell/ms2290/devicetree.cb
index 57d2dd7..b49f4d5 100644
--- a/src/mainboard/packardbell/ms2290/devicetree.cb
+++ b/src/mainboard/packardbell/ms2290/devicetree.cb
@@ -19,12 +19,14 @@
    register "gpu_pch_backlight" = "0x061a061a"

device cpu_cluster 0 on
+		ops ironlake_cpu_bus_ops
    	chip cpu/intel/model_2065x
    		device lapic 0 on end
    	end
    end

device domain 0 on
+		ops ironlake_pci_domain_ops
    	device pci 00.0 on # Host bridge
    		subsystemid 0x1025 0x0379
    	end
diff --git a/src/northbridge/intel/ironlake/northbridge.c b/src/northbridge/intel/ironlake/northbridge.c
index fbad6d4..4935ea9 100644
--- a/src/northbridge/intel/ironlake/northbridge.c
+++ b/src/northbridge/intel/ironlake/northbridge.c
@@ -75,7 +75,7 @@
 }
 #endif

-static struct device_operations pci_domain_ops = {
+struct device_operations ironlake_pci_domain_ops = {
    .read_resources	= pci_domain_read_resources,
    .set_resources	= pci_domain_set_resources,
    .scan_bus	= pci_domain_scan_bus,
@@ -217,24 +217,13 @@
    .devices = pci_device_ids,
 };

-static struct device_operations cpu_bus_ops = {
+struct device_operations ironlake_cpu_bus_ops = {
    .read_resources = noop_read_resources,
    .set_resources = noop_set_resources,
    .init = mp_cpu_bus_init,
 };

-static void enable_dev(struct device *dev)
-{
-	/* Set the operations if it is a special bus type */
-	if (dev->path.type == DEVICE_PATH_DOMAIN) {
-		dev->ops = &pci_domain_ops;
-	} else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) {
-		dev->ops = &cpu_bus_ops;
-	}
-}
-
 struct chip_operations northbridge_intel_ironlake_ops = {
    CHIP_NAME("Intel Ironlake integrated Northbridge")
-	.enable_dev = enable_dev,
    .init = ironlake_init,
 };