build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73889 )
Change subject: soc/intel/common/block/pcie/rtd3: Fix source clock check condition for PM method ......................................................................
Patch Set 1:
(1 comment)
Commit Message:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-172153): https://review.coreboot.org/c/coreboot/+/73889/comment/88f90c4b_569b57b4 PS1, Line 14: TEST=Boot to OS and check that rtd3 ACPI etnries are generated as expected Possible unwrapped commit description (prefer a maximum 72 chars per line)