Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39980 )
Change subject: soc/intel/skylake: vr_config: enable PSI3 and PSI4 by default
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Uploaded patch set 5: Commit message was updated.
(2 comments)
https://review.coreboot.org/c/coreboot/+/39980/3//COMMIT_MSG
Commit Message:
https://review.coreboot.org/c/coreboot/+/39980/3//COMMIT_MSG@18
PS3, Line 18: Boards that have a domain_vr_config and set their specific settings are
Those settings are not in the bios/uefi on any of the firmwares I have checked. […]
Done
https://review.coreboot.org/c/coreboot/+/39980/3//COMMIT_MSG@23
PS3, Line 23: Tested successfully with PSI3/4 enabled.
I'm still trying to find out; the board has the MP2955 but there is no ds. […]
S-Series CPUs with 1151 socket do not have C9/C10 but only C8. Since only C10 makes use of S4 those CPUs won't ever request PS4. That means we do not need to disable it explicitly for these boards.
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