Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/21028
Change subject: intel/common/mrc_cache: Move update_mrc_cache after BS_DEV_RESOURCES ......................................................................
intel/common/mrc_cache: Move update_mrc_cache after BS_DEV_RESOURCES
This patch to ensures that MRC cache data already written into SPI chip before locking down SPI protected regions inside lockdown configuration.
TEST=Ensure MRC training data is store into SPI chip and S3 entry <-> exit is working fine.
Change-Id: I8ee26b5cc70433438cf4e45e707b8a54f89cf9b0 Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/soc/intel/common/mrc_cache.c 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/21028/1
diff --git a/src/soc/intel/common/mrc_cache.c b/src/soc/intel/common/mrc_cache.c index 3ad4cb0..76d8435 100644 --- a/src/soc/intel/common/mrc_cache.c +++ b/src/soc/intel/common/mrc_cache.c @@ -531,4 +531,4 @@ protect_mrc_region(); }
-BOOT_STATE_INIT_ENTRY(BS_WRITE_TABLES, BS_ON_ENTRY, update_mrc_cache, NULL); +BOOT_STATE_INIT_ENTRY(BS_DEV_RESOURCES, BS_ON_EXIT, update_mrc_cache, NULL);