Change in coreboot[master]: mb/google/brya/var/felwinter: Disable PCIE port 6

[EricR Lai (Code Review)]

Attention is currently required from: Nick Vaccaro.
Hello build bot (Jenkins), Tim Wawrzynczak, Nick Vaccaro,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/59243

to look at the new patch set (#3).

Change subject: mb/google/brya/var/felwinter: Disable PCIE port 6
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mb/google/brya/var/felwinter: Disable PCIE port 6

PCIE port 6 is empty as per schematics.

BUG=b:206047996
TEST=PCIE port 6 is disabled.

Signed-off-by: Eric Lai 
Change-Id: I30fa897c9310c44545e3df670895639a5144e1de
---
M src/mainboard/google/brya/variants/felwinter/overridetree.cb
1 file changed, 1 insertion(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/59243/3