Change in coreboot[master]: soc/intel/cannonlake/acpi/serialio.asl: Don't advertise unavailable d...
Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44198 )
Change subject: soc/intel/cannonlake/acpi/serialio.asl: Don't advertise unavailable devices ......................................................................
soc/intel/cannonlake/acpi/serialio.asl: Don't advertise unavailable devices
On PCH-H the I2C4 0:19.0 device isn't usable and thus 0:19.1 and 0:19.2 can't be detected using standard PCI probing.
Remove I2C4, I2C5 and UART2 from generic ASL code on PCH-H platforms.
Change-Id: I89f9ab7d4afb2e7d1b1e24d072adf99e0da6fecf Signed-off-by: Patrick Rudolph patrick.rudolph@9elements.com --- M src/soc/intel/cannonlake/acpi/serialio.asl 1 file changed, 4 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/44198/1
diff --git a/src/soc/intel/cannonlake/acpi/serialio.asl b/src/soc/intel/cannonlake/acpi/serialio.asl index e4a675e..d88c570 100644 --- a/src/soc/intel/cannonlake/acpi/serialio.asl +++ b/src/soc/intel/cannonlake/acpi/serialio.asl @@ -26,6 +26,7 @@ Name (_DDN, "Serial IO I2C Controller 3") }
+#if !CONFIG(SOC_INTEL_CANNONLAKE_PCH_H) Device (I2C4) { Name (_ADR, 0x00190000) @@ -37,6 +38,7 @@ Name (_ADR, 0x00190001) Name (_DDN, "Serial IO I2C Controller 5") } +#endif
Device (SPI0) { @@ -56,6 +58,7 @@ Name (_DDN, "Serial IO SPI Controller 2") }
+#if !CONFIG(SOC_INTEL_CANNONLAKE_PCH_H) Device (UAR0) { Name (_ADR, 0x001e0000) @@ -73,3 +76,4 @@ Name (_ADR, 0x00190002) Name (_DDN, "Serial IO UART Controller 2") } +#endif
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44198 )
Change subject: soc/intel/cannonlake/acpi/serialio.asl: Don't advertise unavailable devices ......................................................................
Patch Set 1: Code-Review+1
(1 comment)
https://review.coreboot.org/c/coreboot/+/44198/1/src/soc/intel/cannonlake/ac... File src/soc/intel/cannonlake/acpi/serialio.asl:
https://review.coreboot.org/c/coreboot/+/44198/1/src/soc/intel/cannonlake/ac... PS1, Line 62: Device (UAR0) : { : Name (_ADR, 0x001e0000) : Name (_DDN, "Serial IO UART Controller 0") : } : : Device (UAR1) : { : Name (_ADR, 0x001e0001) : Name (_DDN, "Serial IO UART Controller 1") : } These aren't mentioned in the commit message
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44198 )
Change subject: soc/intel/cannonlake/acpi/serialio.asl: Don't advertise unavailable devices ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44198/1/src/soc/intel/cannonlake/ac... File src/soc/intel/cannonlake/acpi/serialio.asl:
https://review.coreboot.org/c/coreboot/+/44198/1/src/soc/intel/cannonlake/ac... PS1, Line 62: Device (UAR0) : { : Name (_ADR, 0x001e0000) : Name (_DDN, "Serial IO UART Controller 0") : } : : Device (UAR1) : { : Name (_ADR, 0x001e0001) : Name (_DDN, "Serial IO UART Controller 1") : }
These aren't mentioned in the commit message
Good catch. That's also wrong. Both device operate fine in PCI mode.
Hello build bot (Jenkins), Angel Pons, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44198
to look at the new patch set (#2).
Change subject: soc/intel/cannonlake/acpi/serialio.asl: Don't advertise unavailable devices ......................................................................
soc/intel/cannonlake/acpi/serialio.asl: Don't advertise unavailable devices
On PCH-H the I2C4 0:19.0 device isn't usable and thus 0:19.1 and 0:19.2 can't be detected using standard PCI probing.
Remove I2C4, I2C5 and UART2 from generic ASL code on PCH-H platforms that advertise its PCI conformance by the _ADR attribute.
Change-Id: I89f9ab7d4afb2e7d1b1e24d072adf99e0da6fecf Signed-off-by: Patrick Rudolph patrick.rudolph@9elements.com --- M src/soc/intel/cannonlake/acpi/serialio.asl 1 file changed, 4 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/44198/2
Hello build bot (Jenkins), Angel Pons, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44198
to look at the new patch set (#3).
Change subject: soc/intel/cannonlake/acpi/serialio.asl: Don't advertise unavailable devices ......................................................................
soc/intel/cannonlake/acpi/serialio.asl: Don't advertise unavailable devices
On PCH-H the I2C4 0:19.0 device isn't usable and thus 0:19.1 and 0:19.2 can't be detected using standard PCI probing.
Remove I2C4, I2C5 and UART2 from generic ASL code on PCH-H platforms that advertise its PCI conformance by the _ADR attribute.
Change-Id: I89f9ab7d4afb2e7d1b1e24d072adf99e0da6fecf Signed-off-by: Patrick Rudolph patrick.rudolph@9elements.com --- M src/soc/intel/cannonlake/acpi/serialio.asl 1 file changed, 4 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/44198/3
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44198 )
Change subject: soc/intel/cannonlake/acpi/serialio.asl: Don't advertise unavailable devices ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44198/1/src/soc/intel/cannonlake/ac... File src/soc/intel/cannonlake/acpi/serialio.asl:
https://review.coreboot.org/c/coreboot/+/44198/1/src/soc/intel/cannonlake/ac... PS1, Line 62: Device (UAR0) : { : Name (_ADR, 0x001e0000) : Name (_DDN, "Serial IO UART Controller 0") : } : : Device (UAR1) : { : Name (_ADR, 0x001e0001) : Name (_DDN, "Serial IO UART Controller 1") : }
Good catch. That's also wrong. Both device operate fine in PCI mode.
Done
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44198 )
Change subject: soc/intel/cannonlake/acpi/serialio.asl: Don't advertise unavailable devices ......................................................................
Patch Set 3: Code-Review+2
Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/44198 )
Change subject: soc/intel/cannonlake/acpi/serialio.asl: Don't advertise unavailable devices ......................................................................
soc/intel/cannonlake/acpi/serialio.asl: Don't advertise unavailable devices
On PCH-H the I2C4 0:19.0 device isn't usable and thus 0:19.1 and 0:19.2 can't be detected using standard PCI probing.
Remove I2C4, I2C5 and UART2 from generic ASL code on PCH-H platforms that advertise its PCI conformance by the _ADR attribute.
Change-Id: I89f9ab7d4afb2e7d1b1e24d072adf99e0da6fecf Signed-off-by: Patrick Rudolph patrick.rudolph@9elements.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/44198 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com --- M src/soc/intel/cannonlake/acpi/serialio.asl 1 file changed, 4 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/src/soc/intel/cannonlake/acpi/serialio.asl b/src/soc/intel/cannonlake/acpi/serialio.asl index e4a675e..0551191 100644 --- a/src/soc/intel/cannonlake/acpi/serialio.asl +++ b/src/soc/intel/cannonlake/acpi/serialio.asl @@ -26,6 +26,7 @@ Name (_DDN, "Serial IO I2C Controller 3") }
+#if !CONFIG(SOC_INTEL_CANNONLAKE_PCH_H) Device (I2C4) { Name (_ADR, 0x00190000) @@ -37,6 +38,7 @@ Name (_ADR, 0x00190001) Name (_DDN, "Serial IO I2C Controller 5") } +#endif
Device (SPI0) { @@ -68,8 +70,10 @@ Name (_DDN, "Serial IO UART Controller 1") }
+#if !CONFIG(SOC_INTEL_CANNONLAKE_PCH_H) Device (UAR2) { Name (_ADR, 0x00190002) Name (_DDN, "Serial IO UART Controller 2") } +#endif
-
Angel Pons (Code Review) -
Patrick Rudolph (Code Review)