Change in coreboot[master]: nb/x4x/raminit: Rewrite SPD decode and timing selection

[Patrick Rudolph (Code Review)]

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/19143 )

Change subject: nb/x4x/raminit: Rewrite SPD decode and timing selection
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Patch Set 16:

(4 comments)

https://review.coreboot.org/#/c/19143/16/src/northbridge/intel/x4x/raminit.c
File src/northbridge/intel/x4x/raminit.c:

Line 88: 		s->selected_timings.mem_clk = MEM_CLOCK_400MHz; break;
is it allowed ? I thought checkpatch complains about that.
Please use the same style in all switch case blocks.

Line 121: static int ddr2_save_dimminfo(u8 dimm_idx, u8 *raw_spd,
return enum cb_err ?

Line 254: 	if (block_read)	{
space

Line 256: 		i2c_block_read(device, 0, num_bytes, raw_spd);
fallback to spd_read_byte if i2c_block_read returns a failure ?