Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/52940 )
Change subject: arch/x86: Always include walkcbfs.S ......................................................................
arch/x86: Always include walkcbfs.S
Let the linker decide if this code is needed.
Change-Id: I26fb19d461db39ce554af7b948f0d10a12920299 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/arch/x86/Makefile.inc M src/cpu/qemu-x86/Makefile.inc 2 files changed, 1 insertion(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/52940/1
diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index 7dea2ce..0cb6e92 100644 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -91,7 +91,7 @@ $(eval $(call early_x86_stage,bootblock,elf64-x86-64)) endif
-bootblock-$(CONFIG_MICROCODE_UPDATE_PRE_RAM) += walkcbfs.S +bootblock-y += walkcbfs.S
endif # CONFIG_ARCH_BOOTBLOCK_X86_32 / CONFIG_ARCH_BOOTBLOCK_X86_64
diff --git a/src/cpu/qemu-x86/Makefile.inc b/src/cpu/qemu-x86/Makefile.inc index 3f27e8b..fb560d6 100644 --- a/src/cpu/qemu-x86/Makefile.inc +++ b/src/cpu/qemu-x86/Makefile.inc @@ -2,7 +2,6 @@
bootblock-y += cache_as_ram_bootblock.S bootblock-y += bootblock.c -bootblock-$(CONFIG_ARCH_BOOTBLOCK_X86_64) += $(top)/src/arch/x86/walkcbfs.S
romstage-y += ../intel/car/romstage.c
-
Arthur Heymans (Code Review)