Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/19575 )
Change subject: soc/intel/common: Provide common block fast_spi_flash_ctrlr ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/#/c/19575/2/src/soc/intel/common/block/fast_spi/... File src/soc/intel/common/block/fast_spi/fast_spi_flash.c:
Line 354: const struct spi_ctrlr fast_spi_flash_ctrlr = {
Did we want to test that cs == 0 like the prev ->setup() routines?
Yeah, I was thinking about that too, but did not add that since we are allowing SoCs to provide bus-ctrlr mapping. I will add it back.
Maybe we should have a config option which says SPI_FLASH_BUS and have that check? In fact that SPI_FLASH_BUS can be used within coreboot at a number of places.