Change in coreboot[master]: soc/intel/broadwell: Use MCHBAR register names on finalize

[Angel Pons (Code Review)]

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46526 )

Change subject: soc/intel/broadwell: Use MCHBAR register names on finalize
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soc/intel/broadwell: Use MCHBAR register names on finalize

Tested with BUILD_TIMELESS=1, Purism Librem 13 v1 remains identical.

Change-Id: I7274334ff3ce2d9887cc3d8a1ba54a9c52286cc4
Signed-off-by: Angel Pons 
---
M src/soc/intel/broadwell/finalize.c
M src/soc/intel/broadwell/include/soc/systemagent.h
2 files changed, 30 insertions(+), 12 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/46526/1

diff --git a/src/soc/intel/broadwell/finalize.c b/src/soc/intel/broadwell/finalize.c
index fe3dfb6..869b767 100644
--- a/src/soc/intel/broadwell/finalize.c
+++ b/src/soc/intel/broadwell/finalize.c
@@ -37,24 +37,24 @@
    pci_or_config32(host_bridge, 0xb8, 1 << 0);	/* TSEGMB */
    pci_or_config32(host_bridge, 0xbc, 1 << 0);	/* TOLUD */

-	MCHBAR32(0x5500) |= 1 << 0;
-	MCHBAR32(0x5f00) |= 1 << 31;
-	MCHBAR32(0x6020) |= 1 << 0;
-	MCHBAR32(0x63fc) |= 1 << 0;
-	MCHBAR32(0x6800) |= 1 << 31;
-	MCHBAR32(0x7000) |= 1 << 31;
-	MCHBAR32(0x77fc) |= 1 << 0;
+	MCHBAR32(MMIO_PAVP_MSG) |= 1 << 0;
+	MCHBAR32(SAPMCTL)       |= 1 << 31;
+	MCHBAR32(UMAGFXCTL)     |= 1 << 0;
+	MCHBAR32(VTDTRKLCK)     |= 1 << 0;
+	MCHBAR32(REQLIM)        |= 1 << 31;
+	MCHBAR32(DMIVCLIM)      |= 1 << 31;
+	MCHBAR32(CRDTLCK)       |= 1 << 0;

/* Memory Controller Lockdown */
-	MCHBAR8(0x50fc) = 0x8f;
+	MCHBAR8(MC_LOCK) = 0x8f;

/* Read+write the following */
-	MCHBAR32(0x6030) = MCHBAR32(0x6030);
-	MCHBAR32(0x6034) = MCHBAR32(0x6034);
-	MCHBAR32(0x6008) = MCHBAR32(0x6008);
+	MCHBAR32(VDMBDFBARKVM)  = MCHBAR32(VDMBDFBARKVM);
+	MCHBAR32(VDMBDFBARPAVP) = MCHBAR32(VDMBDFBARPAVP);
+	MCHBAR32(HDAUDRID)      = MCHBAR32(HDAUDRID);

/* This is a lock bit, but does not appear in the SA locking sequence */
-	MCHBAR32(0x5880) |= 1 << 5;
+	MCHBAR32(PCU_DDR_PTM_CTL) |= 1 << 5;
 }

const struct reg_script pch_finalize_script[] = {
diff --git a/src/soc/intel/broadwell/include/soc/systemagent.h b/src/soc/intel/broadwell/include/soc/systemagent.h
index c2c5cc8..52d386b 100644
--- a/src/soc/intel/broadwell/include/soc/systemagent.h
+++ b/src/soc/intel/broadwell/include/soc/systemagent.h
@@ -85,6 +85,9 @@
 #define MCHBAR32(x)	*((volatile u32 *)(MCH_BASE_ADDRESS + x))

#define MCHBAR_PEI_VERSION	0x5034
+
+#define MC_LOCK			0x50fc
+
 #define BIOS_RESET_CPL		0x5da8
 #define GFXVTBAR		0x5400
 #define EDRAMBAR		0x5408
@@ -92,11 +95,26 @@
 #define MCH_PAIR		0x5418
 #define GDXCBAR			0x5420

+#define MMIO_PAVP_MSG		0x5500
+
+#define PCU_DDR_PTM_CTL		0x5880
+
 #define MCH_PKG_POWER_LIMIT_LO	0x59a0
 #define MCH_PKG_POWER_LIMIT_HI	0x59a4
 #define MCH_DDR_POWER_LIMIT_LO	0x58e0
 #define MCH_DDR_POWER_LIMIT_HI	0x58e4

+#define SAPMCTL			0x5f00
+
+#define HDAUDRID		0x6008
+#define UMAGFXCTL		0x6020
+#define VDMBDFBARKVM		0x6030
+#define VDMBDFBARPAVP		0x6034
+#define VTDTRKLCK		0x63fc
+#define REQLIM			0x6800
+#define DMIVCLIM		0x7000
+#define CRDTLCK			0x77fc
+
 /* PCODE MMIO communications live in the MCHBAR. */
 #define BIOS_MAILBOX_INTERFACE			0x5da4
 #define  MAILBOX_RUN_BUSY			(1 << 31)

[Angel Pons (Code Review)]

Angel Pons has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/46526 )

Change subject: soc/intel/broadwell: Use MCHBAR register names on finalize
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Abandoned

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