Paul Menzel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46065 )
Change subject: vendorcode/amd: Fix typo in *is defined* in comments ......................................................................
vendorcode/amd: Fix typo in *is defined* in comments
The passive clause is constructed with the past participle, which is *defined* in this case. Fix all occurrences in AMD vendor code with the command below.
$ git grep -l "is define at" src/vendorcode/amd/ | xargs sed -i 's/is define at/is defined at/'
Change-Id: Ia26c87aecb484dcb55737e417367757d38ce3b56 Signed-off-by: Paul Menzel pmenzel@molgen.mpg.de --- M src/vendorcode/amd/agesa/f15tn/Proc/Fch/Common/FchCommonCfg.h M src/vendorcode/amd/agesa/f16kb/Proc/Fch/Common/FchCommonCfg.h M src/vendorcode/amd/cimx/sb800/SBTYPE.h M src/vendorcode/amd/cimx/sb900/SbType.h M src/vendorcode/amd/pi/00630F01/Proc/Fch/Common/FchCommonCfg.h M src/vendorcode/amd/pi/00660F01/Proc/Fch/Common/FchCommonCfg.h M src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchCommonCfg.h M src/vendorcode/amd/pi/00730F01/Proc/Fch/Common/FchCommonCfg.h 8 files changed, 62 insertions(+), 62 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/46065/1
diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/Fch/Common/FchCommonCfg.h b/src/vendorcode/amd/agesa/f15tn/Proc/Fch/Common/FchCommonCfg.h index be373c7..bc755f0 100644 --- a/src/vendorcode/amd/agesa/f15tn/Proc/Fch/Common/FchCommonCfg.h +++ b/src/vendorcode/amd/agesa/f15tn/Proc/Fch/Common/FchCommonCfg.h @@ -140,19 +140,19 @@
UINT8 AzaliaSdin1; ///< AzaliaSdin1 /// @par - /// SDIN1 is define at BIT2 & BIT3 + /// SDIN1 is defined at BIT2 & BIT3 /// @li <b>00</b> - GPIO PIN /// @li <b>10</b> - As a Azalia SDIN pin
UINT8 AzaliaSdin2; ///< AzaliaSdin2 /// @par - /// SDIN2 is define at BIT4 & BIT5 + /// SDIN2 is defined at BIT4 & BIT5 /// @li <b>00</b> - GPIO PIN /// @li <b>10</b> - As a Azalia SDIN pin
UINT8 AzaliaSdin3; ///< AzaliaSdin3 /// @par - /// SDIN3 is define at BIT6 & BIT7 + /// SDIN3 is defined at BIT6 & BIT7 /// @li <b>00</b> - GPIO PIN /// @li <b>10</b> - As a Azalia SDIN pin } AZALIA_PIN; diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/Fch/Common/FchCommonCfg.h b/src/vendorcode/amd/agesa/f16kb/Proc/Fch/Common/FchCommonCfg.h index 9009f6b..b318665 100644 --- a/src/vendorcode/amd/agesa/f16kb/Proc/Fch/Common/FchCommonCfg.h +++ b/src/vendorcode/amd/agesa/f16kb/Proc/Fch/Common/FchCommonCfg.h @@ -145,19 +145,19 @@
UINT8 AzaliaSdin1; ///< AzaliaSdin1 /// @par - /// SDIN1 is define at BIT2 & BIT3 + /// SDIN1 is defined at BIT2 & BIT3 /// @li <b>00</b> - GPIO PIN /// @li <b>10</b> - As a Azalia SDIN pin
UINT8 AzaliaSdin2; ///< AzaliaSdin2 /// @par - /// SDIN2 is define at BIT4 & BIT5 + /// SDIN2 is defined at BIT4 & BIT5 /// @li <b>00</b> - GPIO PIN /// @li <b>10</b> - As a Azalia SDIN pin
UINT8 AzaliaSdin3; ///< AzaliaSdin3 /// @par - /// SDIN3 is define at BIT6 & BIT7 + /// SDIN3 is defined at BIT6 & BIT7 /// @li <b>00</b> - GPIO PIN /// @li <b>10</b> - As a Azalia SDIN pin } AZALIA_PIN; diff --git a/src/vendorcode/amd/cimx/sb800/SBTYPE.h b/src/vendorcode/amd/cimx/sb800/SBTYPE.h index b897950..2fa7923 100644 --- a/src/vendorcode/amd/cimx/sb800/SBTYPE.h +++ b/src/vendorcode/amd/cimx/sb800/SBTYPE.h @@ -538,25 +538,25 @@
/** _USBST Controller structure * - * Usb Ohci1 Contoller is define at BIT0 + * Usb Ohci1 Contoller is defined at BIT0 * - 0:disable 1:enable * (Bus 0 Dev 18 Func0) * - * Usb Ehci1 Contoller is define at BIT1 + * Usb Ehci1 Contoller is defined at BIT1 * - 0:disable 1:enable * (Bus 0 Dev 18 Func2) * - * Usb Ohci2 Contoller is define at BIT2 + * Usb Ohci2 Contoller is defined at BIT2 * - 0:disable 1:enable * (Bus 0 Dev 19 Func0) * - * Usb Ehci2 Contoller is define at BIT3 + * Usb Ehci2 Contoller is defined at BIT3 * - 0:disable 1:enable * (Bus 0 Dev 19 Func2) * - * Usb Ohci3 Contoller is define at BIT4 + * Usb Ohci3 Contoller is defined at BIT4 * - 0:disable 1:enable * (Bus 0 Dev 22 Func0) * - * Usb Ehci3 Contoller is define at BIT5 + * Usb Ehci3 Contoller is defined at BIT5 * - 0:disable 1:enable * (Bus 0 Dev 22 Func2) * - * Usb Ohci4 Contoller is define at BIT6 + * Usb Ohci4 Contoller is defined at BIT6 * - 0:disable 1:enable * (Bus 0 Dev 20 Func5) * */ @@ -578,25 +578,25 @@ typedef struct _AZALIAPIN { unsigned char AzaliaSdin0:2; /**< AzaliaSdin0 * @par - * SDIN0 is define at BIT0 & BIT1 + * SDIN0 is defined at BIT0 & BIT1 * @li <b>00</b> - GPIO PIN * @li <b>10</b> - As a Azalia SDIN pin */ unsigned char AzaliaSdin1:2; /**< AzaliaSdin1 * @par - * SDIN0 is define at BIT2 & BIT3 + * SDIN0 is defined at BIT2 & BIT3 * @li <b>00</b> - GPIO PIN * @li <b>10</b> - As a Azalia SDIN pin */ unsigned char AzaliaSdin2:2; /**< AzaliaSdin2 * @par - * SDIN0 is define at BIT4 & BIT5 + * SDIN0 is defined at BIT4 & BIT5 * @li <b>00</b> - GPIO PIN * @li <b>10</b> - As a Azalia SDIN pin */ unsigned char AzaliaSdin3:2; /**< AzaliaSdin3 * @par - * SDIN0 is define at BIT6 & BIT7 + * SDIN0 is defined at BIT6 & BIT7 * @li <b>00</b> - GPIO PIN * @li <b>10</b> - As a Azalia SDIN pin */ @@ -718,25 +718,25 @@
/** USBDeviceConfig - USB Controller Configuration * - * - Usb Ohci1 Contoller is define at BIT0 + * - Usb Ohci1 Contoller is defined at BIT0 * - 0:disable 1:enable * (Bus 0 Dev 18 Func0) * - * - Usb Ehci1 Contoller is define at BIT1 + * - Usb Ehci1 Contoller is defined at BIT1 * - 0:disable 1:enable * (Bus 0 Dev 18 Func2) * - * - Usb Ohci2 Contoller is define at BIT2 + * - Usb Ohci2 Contoller is defined at BIT2 * - 0:disable 1:enable * (Bus 0 Dev 19 Func0) * - * - Usb Ehci2 Contoller is define at BIT3 + * - Usb Ehci2 Contoller is defined at BIT3 * - 0:disable 1:enable * (Bus 0 Dev 19 Func2) * - * - Usb Ohci3 Contoller is define at BIT4 + * - Usb Ohci3 Contoller is defined at BIT4 * - 0:disable 1:enable * (Bus 0 Dev 22 Func0) * - * - Usb Ehci3 Contoller is define at BIT5 + * - Usb Ehci3 Contoller is defined at BIT5 * - 0:disable 1:enable * (Bus 0 Dev 22 Func2) * - * - Usb Ohci4 Contoller is define at BIT6 + * - Usb Ohci4 Contoller is defined at BIT6 * - 0:disable 1:enable * (Bus 0 Dev 20 Func5) * */ @@ -816,16 +816,16 @@ { /**< AzaliaSdinPin - Azalia Controller SDIN pin Configuration * - * SDIN0 is define at BIT0 & BIT1 + * SDIN0 is defined at BIT0 & BIT1 * - 00: GPIO PIN * - 01: Reserved * - 10: As a Azalia SDIN pin * - * SDIN1 is define at BIT2 & BIT3 + * SDIN1 is defined at BIT2 & BIT3 * * Config same as SDIN0 - * SDIN2 is define at BIT4 & BIT5 + * SDIN2 is defined at BIT4 & BIT5 * * Config same as SDIN0 - * SDIN3 is define at BIT6 & BIT7 + * SDIN3 is defined at BIT6 & BIT7 * * Config same as SDIN0 */ unsigned char AzaliaSdinPin; diff --git a/src/vendorcode/amd/cimx/sb900/SbType.h b/src/vendorcode/amd/cimx/sb900/SbType.h index 87f49bd..eeedbba 100644 --- a/src/vendorcode/amd/cimx/sb900/SbType.h +++ b/src/vendorcode/amd/cimx/sb900/SbType.h @@ -613,25 +613,25 @@
/** _USBST Controller structure * - * Usb Ohci1 Contoller is define at BIT0 + * Usb Ohci1 Contoller is defined at BIT0 * - 0:disable 1:enable * (Bus 0 Dev 18 Func0) * - * Usb Ehci1 Contoller is define at BIT1 + * Usb Ehci1 Contoller is defined at BIT1 * - 0:disable 1:enable * (Bus 0 Dev 18 Func2) * - * Usb Ohci2 Contoller is define at BIT2 + * Usb Ohci2 Contoller is defined at BIT2 * - 0:disable 1:enable * (Bus 0 Dev 19 Func0) * - * Usb Ehci2 Contoller is define at BIT3 + * Usb Ehci2 Contoller is defined at BIT3 * - 0:disable 1:enable * (Bus 0 Dev 19 Func2) * - * Usb Ohci3 Contoller is define at BIT4 + * Usb Ohci3 Contoller is defined at BIT4 * - 0:disable 1:enable * (Bus 0 Dev 22 Func0) * - * Usb Ehci3 Contoller is define at BIT5 + * Usb Ehci3 Contoller is defined at BIT5 * - 0:disable 1:enable * (Bus 0 Dev 22 Func2) * - * Usb Ohci4 Contoller is define at BIT6 + * Usb Ohci4 Contoller is defined at BIT6 * - 0:disable 1:enable * (Bus 0 Dev 20 Func5) * */ @@ -684,25 +684,25 @@ unsigned char AzaliaSdinPin; ///< @todo Style_Analyzer: Add Doxygen comments to struct entry unsigned char AzaliaSdin0; /**< AzaliaSdin0 * @par - * SDIN0 is define at BIT0 & BIT1 + * SDIN0 is defined at BIT0 & BIT1 * @li <b>00</b> - GPIO PIN * @li <b>10</b> - As a Azalia SDIN pin */ unsigned char AzaliaSdin1; /**< AzaliaSdin1 * @par - * SDIN0 is define at BIT2 & BIT3 + * SDIN0 is defined at BIT2 & BIT3 * @li <b>00</b> - GPIO PIN * @li <b>10</b> - As a Azalia SDIN pin */ unsigned char AzaliaSdin2; /**< AzaliaSdin2 * @par - * SDIN0 is define at BIT4 & BIT5 + * SDIN0 is defined at BIT4 & BIT5 * @li <b>00</b> - GPIO PIN * @li <b>10</b> - As a Azalia SDIN pin */ unsigned char AzaliaSdin3; /**< AzaliaSdin3 * @par - * SDIN0 is define at BIT6 & BIT7 + * SDIN0 is defined at BIT6 & BIT7 * @li <b>00</b> - GPIO PIN * @li <b>10</b> - As a Azalia SDIN pin */ @@ -927,25 +927,25 @@
/** USBDeviceConfig - USB Controller Configuration * - * Usb Ohci1 Contoller is define at BIT0 + * Usb Ohci1 Contoller is defined at BIT0 * - 0:disable 1:enable * (Bus 0 Dev 18 Func0) * - * Usb Ehci1 Contoller is define at BIT1 + * Usb Ehci1 Contoller is defined at BIT1 * - 0:disable 1:enable * (Bus 0 Dev 18 Func2) * - * Usb Ohci2 Contoller is define at BIT2 + * Usb Ohci2 Contoller is defined at BIT2 * - 0:disable 1:enable * (Bus 0 Dev 19 Func0) * - * Usb Ehci2 Contoller is define at BIT3 + * Usb Ehci2 Contoller is defined at BIT3 * - 0:disable 1:enable * (Bus 0 Dev 19 Func2) * - * Usb Ohci3 Contoller is define at BIT4 + * Usb Ohci3 Contoller is defined at BIT4 * - 0:disable 1:enable * (Bus 0 Dev 22 Func0) * - * Usb Ehci3 Contoller is define at BIT5 + * Usb Ehci3 Contoller is defined at BIT5 * - 0:disable 1:enable * (Bus 0 Dev 22 Func2) * - * Usb Ohci4 Contoller is define at BIT6 + * Usb Ohci4 Contoller is defined at BIT6 * - 0:disable 1:enable * (Bus 0 Dev 20 Func5) * */ @@ -1021,16 +1021,16 @@ { /**< AzaliaSdinPin - Azalia Controller SDIN pin Configuration 00-51 * - * SDIN0 is define at BIT0 & BIT1 + * SDIN0 is defined at BIT0 & BIT1 * - 00: GPIO PIN * - 01: Reserved * - 10: As a Azalia SDIN pin * - * SDIN1 is define at BIT2 & BIT3 + * SDIN1 is defined at BIT2 & BIT3 * * Config same as SDIN0 - * SDIN2 is define at BIT4 & BIT5 + * SDIN2 is defined at BIT4 & BIT5 * * Config same as SDIN0 - * SDIN3 is define at BIT6 & BIT7 + * SDIN3 is defined at BIT6 & BIT7 * * Config same as SDIN0 */ unsigned char AzaliaSdinPin; diff --git a/src/vendorcode/amd/pi/00630F01/Proc/Fch/Common/FchCommonCfg.h b/src/vendorcode/amd/pi/00630F01/Proc/Fch/Common/FchCommonCfg.h index 39a11ba..b10eca7 100644 --- a/src/vendorcode/amd/pi/00630F01/Proc/Fch/Common/FchCommonCfg.h +++ b/src/vendorcode/amd/pi/00630F01/Proc/Fch/Common/FchCommonCfg.h @@ -148,19 +148,19 @@
UINT8 AzaliaSdin1; ///< AzaliaSdin1 /// @par - /// SDIN1 is define at BIT2 & BIT3 + /// SDIN1 is defined at BIT2 & BIT3 /// @li <b>00</b> - GPIO PIN /// @li <b>10</b> - As a Azalia SDIN pin
UINT8 AzaliaSdin2; ///< AzaliaSdin2 /// @par - /// SDIN2 is define at BIT4 & BIT5 + /// SDIN2 is defined at BIT4 & BIT5 /// @li <b>00</b> - GPIO PIN /// @li <b>10</b> - As a Azalia SDIN pin
UINT8 AzaliaSdin3; ///< AzaliaSdin3 /// @par - /// SDIN3 is define at BIT6 & BIT7 + /// SDIN3 is defined at BIT6 & BIT7 /// @li <b>00</b> - GPIO PIN /// @li <b>10</b> - As a Azalia SDIN pin } AZALIA_PIN; diff --git a/src/vendorcode/amd/pi/00660F01/Proc/Fch/Common/FchCommonCfg.h b/src/vendorcode/amd/pi/00660F01/Proc/Fch/Common/FchCommonCfg.h index 35a76d2..8c557bc 100644 --- a/src/vendorcode/amd/pi/00660F01/Proc/Fch/Common/FchCommonCfg.h +++ b/src/vendorcode/amd/pi/00660F01/Proc/Fch/Common/FchCommonCfg.h @@ -177,19 +177,19 @@
UINT8 AzaliaSdin1; ///< AzaliaSdin1 /// @par - /// SDIN1 is define at BIT2 & BIT3 + /// SDIN1 is defined at BIT2 & BIT3 /// @li <b>00</b> - GPIO PIN /// @li <b>10</b> - As a Azalia SDIN pin
UINT8 AzaliaSdin2; ///< AzaliaSdin2 /// @par - /// SDIN2 is define at BIT4 & BIT5 + /// SDIN2 is defined at BIT4 & BIT5 /// @li <b>00</b> - GPIO PIN /// @li <b>10</b> - As a Azalia SDIN pin
UINT8 AzaliaSdin3; ///< AzaliaSdin3 /// @par - /// SDIN3 is define at BIT6 & BIT7 + /// SDIN3 is defined at BIT6 & BIT7 /// @li <b>00</b> - GPIO PIN /// @li <b>10</b> - As a Azalia SDIN pin } AZALIA_PIN; diff --git a/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchCommonCfg.h b/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchCommonCfg.h index 21f73a3..6dcfb7e 100644 --- a/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchCommonCfg.h +++ b/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchCommonCfg.h @@ -182,19 +182,19 @@
UINT8 AzaliaSdin1; ///< AzaliaSdin1 /// @par - /// SDIN1 is define at BIT2 & BIT3 + /// SDIN1 is defined at BIT2 & BIT3 /// @li <b>00</b> - GPIO PIN /// @li <b>10</b> - As a Azalia SDIN pin
UINT8 AzaliaSdin2; ///< AzaliaSdin2 /// @par - /// SDIN2 is define at BIT4 & BIT5 + /// SDIN2 is defined at BIT4 & BIT5 /// @li <b>00</b> - GPIO PIN /// @li <b>10</b> - As a Azalia SDIN pin
UINT8 AzaliaSdin3; ///< AzaliaSdin3 /// @par - /// SDIN3 is define at BIT6 & BIT7 + /// SDIN3 is defined at BIT6 & BIT7 /// @li <b>00</b> - GPIO PIN /// @li <b>10</b> - As a Azalia SDIN pin } AZALIA_PIN; diff --git a/src/vendorcode/amd/pi/00730F01/Proc/Fch/Common/FchCommonCfg.h b/src/vendorcode/amd/pi/00730F01/Proc/Fch/Common/FchCommonCfg.h index 72e6aeb..f96dfdb 100644 --- a/src/vendorcode/amd/pi/00730F01/Proc/Fch/Common/FchCommonCfg.h +++ b/src/vendorcode/amd/pi/00730F01/Proc/Fch/Common/FchCommonCfg.h @@ -152,19 +152,19 @@
UINT8 AzaliaSdin1; ///< AzaliaSdin1 /// @par - /// SDIN1 is define at BIT2 & BIT3 + /// SDIN1 is defined at BIT2 & BIT3 /// @li <b>00</b> - GPIO PIN /// @li <b>10</b> - As a Azalia SDIN pin
UINT8 AzaliaSdin2; ///< AzaliaSdin2 /// @par - /// SDIN2 is define at BIT4 & BIT5 + /// SDIN2 is defined at BIT4 & BIT5 /// @li <b>00</b> - GPIO PIN /// @li <b>10</b> - As a Azalia SDIN pin
UINT8 AzaliaSdin3; ///< AzaliaSdin3 /// @par - /// SDIN3 is define at BIT6 & BIT7 + /// SDIN3 is defined at BIT6 & BIT7 /// @li <b>00</b> - GPIO PIN /// @li <b>10</b> - As a Azalia SDIN pin } AZALIA_PIN;
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46065 )
Change subject: vendorcode/amd: Fix typo in *is defined* in comments ......................................................................
Patch Set 1: Code-Review+2
Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46065 )
Change subject: vendorcode/amd: Fix typo in *is defined* in comments ......................................................................
vendorcode/amd: Fix typo in *is defined* in comments
The passive clause is constructed with the past participle, which is *defined* in this case. Fix all occurrences in AMD vendor code with the command below.
$ git grep -l "is define at" src/vendorcode/amd/ | xargs sed -i 's/is define at/is defined at/'
Change-Id: Ia26c87aecb484dcb55737e417367757d38ce3b56 Signed-off-by: Paul Menzel pmenzel@molgen.mpg.de Reviewed-on: https://review.coreboot.org/c/coreboot/+/46065 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com --- M src/vendorcode/amd/agesa/f15tn/Proc/Fch/Common/FchCommonCfg.h M src/vendorcode/amd/agesa/f16kb/Proc/Fch/Common/FchCommonCfg.h M src/vendorcode/amd/cimx/sb800/SBTYPE.h M src/vendorcode/amd/cimx/sb900/SbType.h M src/vendorcode/amd/pi/00630F01/Proc/Fch/Common/FchCommonCfg.h M src/vendorcode/amd/pi/00660F01/Proc/Fch/Common/FchCommonCfg.h M src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchCommonCfg.h M src/vendorcode/amd/pi/00730F01/Proc/Fch/Common/FchCommonCfg.h 8 files changed, 62 insertions(+), 62 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/Fch/Common/FchCommonCfg.h b/src/vendorcode/amd/agesa/f15tn/Proc/Fch/Common/FchCommonCfg.h index be373c7..bc755f0 100644 --- a/src/vendorcode/amd/agesa/f15tn/Proc/Fch/Common/FchCommonCfg.h +++ b/src/vendorcode/amd/agesa/f15tn/Proc/Fch/Common/FchCommonCfg.h @@ -140,19 +140,19 @@
UINT8 AzaliaSdin1; ///< AzaliaSdin1 /// @par - /// SDIN1 is define at BIT2 & BIT3 + /// SDIN1 is defined at BIT2 & BIT3 /// @li <b>00</b> - GPIO PIN /// @li <b>10</b> - As a Azalia SDIN pin
UINT8 AzaliaSdin2; ///< AzaliaSdin2 /// @par - /// SDIN2 is define at BIT4 & BIT5 + /// SDIN2 is defined at BIT4 & BIT5 /// @li <b>00</b> - GPIO PIN /// @li <b>10</b> - As a Azalia SDIN pin
UINT8 AzaliaSdin3; ///< AzaliaSdin3 /// @par - /// SDIN3 is define at BIT6 & BIT7 + /// SDIN3 is defined at BIT6 & BIT7 /// @li <b>00</b> - GPIO PIN /// @li <b>10</b> - As a Azalia SDIN pin } AZALIA_PIN; diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/Fch/Common/FchCommonCfg.h b/src/vendorcode/amd/agesa/f16kb/Proc/Fch/Common/FchCommonCfg.h index 9009f6b..b318665 100644 --- a/src/vendorcode/amd/agesa/f16kb/Proc/Fch/Common/FchCommonCfg.h +++ b/src/vendorcode/amd/agesa/f16kb/Proc/Fch/Common/FchCommonCfg.h @@ -145,19 +145,19 @@
UINT8 AzaliaSdin1; ///< AzaliaSdin1 /// @par - /// SDIN1 is define at BIT2 & BIT3 + /// SDIN1 is defined at BIT2 & BIT3 /// @li <b>00</b> - GPIO PIN /// @li <b>10</b> - As a Azalia SDIN pin
UINT8 AzaliaSdin2; ///< AzaliaSdin2 /// @par - /// SDIN2 is define at BIT4 & BIT5 + /// SDIN2 is defined at BIT4 & BIT5 /// @li <b>00</b> - GPIO PIN /// @li <b>10</b> - As a Azalia SDIN pin
UINT8 AzaliaSdin3; ///< AzaliaSdin3 /// @par - /// SDIN3 is define at BIT6 & BIT7 + /// SDIN3 is defined at BIT6 & BIT7 /// @li <b>00</b> - GPIO PIN /// @li <b>10</b> - As a Azalia SDIN pin } AZALIA_PIN; diff --git a/src/vendorcode/amd/cimx/sb800/SBTYPE.h b/src/vendorcode/amd/cimx/sb800/SBTYPE.h index b897950..2fa7923 100644 --- a/src/vendorcode/amd/cimx/sb800/SBTYPE.h +++ b/src/vendorcode/amd/cimx/sb800/SBTYPE.h @@ -538,25 +538,25 @@
/** _USBST Controller structure * - * Usb Ohci1 Contoller is define at BIT0 + * Usb Ohci1 Contoller is defined at BIT0 * - 0:disable 1:enable * (Bus 0 Dev 18 Func0) * - * Usb Ehci1 Contoller is define at BIT1 + * Usb Ehci1 Contoller is defined at BIT1 * - 0:disable 1:enable * (Bus 0 Dev 18 Func2) * - * Usb Ohci2 Contoller is define at BIT2 + * Usb Ohci2 Contoller is defined at BIT2 * - 0:disable 1:enable * (Bus 0 Dev 19 Func0) * - * Usb Ehci2 Contoller is define at BIT3 + * Usb Ehci2 Contoller is defined at BIT3 * - 0:disable 1:enable * (Bus 0 Dev 19 Func2) * - * Usb Ohci3 Contoller is define at BIT4 + * Usb Ohci3 Contoller is defined at BIT4 * - 0:disable 1:enable * (Bus 0 Dev 22 Func0) * - * Usb Ehci3 Contoller is define at BIT5 + * Usb Ehci3 Contoller is defined at BIT5 * - 0:disable 1:enable * (Bus 0 Dev 22 Func2) * - * Usb Ohci4 Contoller is define at BIT6 + * Usb Ohci4 Contoller is defined at BIT6 * - 0:disable 1:enable * (Bus 0 Dev 20 Func5) * */ @@ -578,25 +578,25 @@ typedef struct _AZALIAPIN { unsigned char AzaliaSdin0:2; /**< AzaliaSdin0 * @par - * SDIN0 is define at BIT0 & BIT1 + * SDIN0 is defined at BIT0 & BIT1 * @li <b>00</b> - GPIO PIN * @li <b>10</b> - As a Azalia SDIN pin */ unsigned char AzaliaSdin1:2; /**< AzaliaSdin1 * @par - * SDIN0 is define at BIT2 & BIT3 + * SDIN0 is defined at BIT2 & BIT3 * @li <b>00</b> - GPIO PIN * @li <b>10</b> - As a Azalia SDIN pin */ unsigned char AzaliaSdin2:2; /**< AzaliaSdin2 * @par - * SDIN0 is define at BIT4 & BIT5 + * SDIN0 is defined at BIT4 & BIT5 * @li <b>00</b> - GPIO PIN * @li <b>10</b> - As a Azalia SDIN pin */ unsigned char AzaliaSdin3:2; /**< AzaliaSdin3 * @par - * SDIN0 is define at BIT6 & BIT7 + * SDIN0 is defined at BIT6 & BIT7 * @li <b>00</b> - GPIO PIN * @li <b>10</b> - As a Azalia SDIN pin */ @@ -718,25 +718,25 @@
/** USBDeviceConfig - USB Controller Configuration * - * - Usb Ohci1 Contoller is define at BIT0 + * - Usb Ohci1 Contoller is defined at BIT0 * - 0:disable 1:enable * (Bus 0 Dev 18 Func0) * - * - Usb Ehci1 Contoller is define at BIT1 + * - Usb Ehci1 Contoller is defined at BIT1 * - 0:disable 1:enable * (Bus 0 Dev 18 Func2) * - * - Usb Ohci2 Contoller is define at BIT2 + * - Usb Ohci2 Contoller is defined at BIT2 * - 0:disable 1:enable * (Bus 0 Dev 19 Func0) * - * - Usb Ehci2 Contoller is define at BIT3 + * - Usb Ehci2 Contoller is defined at BIT3 * - 0:disable 1:enable * (Bus 0 Dev 19 Func2) * - * - Usb Ohci3 Contoller is define at BIT4 + * - Usb Ohci3 Contoller is defined at BIT4 * - 0:disable 1:enable * (Bus 0 Dev 22 Func0) * - * - Usb Ehci3 Contoller is define at BIT5 + * - Usb Ehci3 Contoller is defined at BIT5 * - 0:disable 1:enable * (Bus 0 Dev 22 Func2) * - * - Usb Ohci4 Contoller is define at BIT6 + * - Usb Ohci4 Contoller is defined at BIT6 * - 0:disable 1:enable * (Bus 0 Dev 20 Func5) * */ @@ -816,16 +816,16 @@ { /**< AzaliaSdinPin - Azalia Controller SDIN pin Configuration * - * SDIN0 is define at BIT0 & BIT1 + * SDIN0 is defined at BIT0 & BIT1 * - 00: GPIO PIN * - 01: Reserved * - 10: As a Azalia SDIN pin * - * SDIN1 is define at BIT2 & BIT3 + * SDIN1 is defined at BIT2 & BIT3 * * Config same as SDIN0 - * SDIN2 is define at BIT4 & BIT5 + * SDIN2 is defined at BIT4 & BIT5 * * Config same as SDIN0 - * SDIN3 is define at BIT6 & BIT7 + * SDIN3 is defined at BIT6 & BIT7 * * Config same as SDIN0 */ unsigned char AzaliaSdinPin; diff --git a/src/vendorcode/amd/cimx/sb900/SbType.h b/src/vendorcode/amd/cimx/sb900/SbType.h index 87f49bd..eeedbba 100644 --- a/src/vendorcode/amd/cimx/sb900/SbType.h +++ b/src/vendorcode/amd/cimx/sb900/SbType.h @@ -613,25 +613,25 @@
/** _USBST Controller structure * - * Usb Ohci1 Contoller is define at BIT0 + * Usb Ohci1 Contoller is defined at BIT0 * - 0:disable 1:enable * (Bus 0 Dev 18 Func0) * - * Usb Ehci1 Contoller is define at BIT1 + * Usb Ehci1 Contoller is defined at BIT1 * - 0:disable 1:enable * (Bus 0 Dev 18 Func2) * - * Usb Ohci2 Contoller is define at BIT2 + * Usb Ohci2 Contoller is defined at BIT2 * - 0:disable 1:enable * (Bus 0 Dev 19 Func0) * - * Usb Ehci2 Contoller is define at BIT3 + * Usb Ehci2 Contoller is defined at BIT3 * - 0:disable 1:enable * (Bus 0 Dev 19 Func2) * - * Usb Ohci3 Contoller is define at BIT4 + * Usb Ohci3 Contoller is defined at BIT4 * - 0:disable 1:enable * (Bus 0 Dev 22 Func0) * - * Usb Ehci3 Contoller is define at BIT5 + * Usb Ehci3 Contoller is defined at BIT5 * - 0:disable 1:enable * (Bus 0 Dev 22 Func2) * - * Usb Ohci4 Contoller is define at BIT6 + * Usb Ohci4 Contoller is defined at BIT6 * - 0:disable 1:enable * (Bus 0 Dev 20 Func5) * */ @@ -684,25 +684,25 @@ unsigned char AzaliaSdinPin; ///< @todo Style_Analyzer: Add Doxygen comments to struct entry unsigned char AzaliaSdin0; /**< AzaliaSdin0 * @par - * SDIN0 is define at BIT0 & BIT1 + * SDIN0 is defined at BIT0 & BIT1 * @li <b>00</b> - GPIO PIN * @li <b>10</b> - As a Azalia SDIN pin */ unsigned char AzaliaSdin1; /**< AzaliaSdin1 * @par - * SDIN0 is define at BIT2 & BIT3 + * SDIN0 is defined at BIT2 & BIT3 * @li <b>00</b> - GPIO PIN * @li <b>10</b> - As a Azalia SDIN pin */ unsigned char AzaliaSdin2; /**< AzaliaSdin2 * @par - * SDIN0 is define at BIT4 & BIT5 + * SDIN0 is defined at BIT4 & BIT5 * @li <b>00</b> - GPIO PIN * @li <b>10</b> - As a Azalia SDIN pin */ unsigned char AzaliaSdin3; /**< AzaliaSdin3 * @par - * SDIN0 is define at BIT6 & BIT7 + * SDIN0 is defined at BIT6 & BIT7 * @li <b>00</b> - GPIO PIN * @li <b>10</b> - As a Azalia SDIN pin */ @@ -927,25 +927,25 @@
/** USBDeviceConfig - USB Controller Configuration * - * Usb Ohci1 Contoller is define at BIT0 + * Usb Ohci1 Contoller is defined at BIT0 * - 0:disable 1:enable * (Bus 0 Dev 18 Func0) * - * Usb Ehci1 Contoller is define at BIT1 + * Usb Ehci1 Contoller is defined at BIT1 * - 0:disable 1:enable * (Bus 0 Dev 18 Func2) * - * Usb Ohci2 Contoller is define at BIT2 + * Usb Ohci2 Contoller is defined at BIT2 * - 0:disable 1:enable * (Bus 0 Dev 19 Func0) * - * Usb Ehci2 Contoller is define at BIT3 + * Usb Ehci2 Contoller is defined at BIT3 * - 0:disable 1:enable * (Bus 0 Dev 19 Func2) * - * Usb Ohci3 Contoller is define at BIT4 + * Usb Ohci3 Contoller is defined at BIT4 * - 0:disable 1:enable * (Bus 0 Dev 22 Func0) * - * Usb Ehci3 Contoller is define at BIT5 + * Usb Ehci3 Contoller is defined at BIT5 * - 0:disable 1:enable * (Bus 0 Dev 22 Func2) * - * Usb Ohci4 Contoller is define at BIT6 + * Usb Ohci4 Contoller is defined at BIT6 * - 0:disable 1:enable * (Bus 0 Dev 20 Func5) * */ @@ -1021,16 +1021,16 @@ { /**< AzaliaSdinPin - Azalia Controller SDIN pin Configuration 00-51 * - * SDIN0 is define at BIT0 & BIT1 + * SDIN0 is defined at BIT0 & BIT1 * - 00: GPIO PIN * - 01: Reserved * - 10: As a Azalia SDIN pin * - * SDIN1 is define at BIT2 & BIT3 + * SDIN1 is defined at BIT2 & BIT3 * * Config same as SDIN0 - * SDIN2 is define at BIT4 & BIT5 + * SDIN2 is defined at BIT4 & BIT5 * * Config same as SDIN0 - * SDIN3 is define at BIT6 & BIT7 + * SDIN3 is defined at BIT6 & BIT7 * * Config same as SDIN0 */ unsigned char AzaliaSdinPin; diff --git a/src/vendorcode/amd/pi/00630F01/Proc/Fch/Common/FchCommonCfg.h b/src/vendorcode/amd/pi/00630F01/Proc/Fch/Common/FchCommonCfg.h index 39a11ba..b10eca7 100644 --- a/src/vendorcode/amd/pi/00630F01/Proc/Fch/Common/FchCommonCfg.h +++ b/src/vendorcode/amd/pi/00630F01/Proc/Fch/Common/FchCommonCfg.h @@ -148,19 +148,19 @@
UINT8 AzaliaSdin1; ///< AzaliaSdin1 /// @par - /// SDIN1 is define at BIT2 & BIT3 + /// SDIN1 is defined at BIT2 & BIT3 /// @li <b>00</b> - GPIO PIN /// @li <b>10</b> - As a Azalia SDIN pin
UINT8 AzaliaSdin2; ///< AzaliaSdin2 /// @par - /// SDIN2 is define at BIT4 & BIT5 + /// SDIN2 is defined at BIT4 & BIT5 /// @li <b>00</b> - GPIO PIN /// @li <b>10</b> - As a Azalia SDIN pin
UINT8 AzaliaSdin3; ///< AzaliaSdin3 /// @par - /// SDIN3 is define at BIT6 & BIT7 + /// SDIN3 is defined at BIT6 & BIT7 /// @li <b>00</b> - GPIO PIN /// @li <b>10</b> - As a Azalia SDIN pin } AZALIA_PIN; diff --git a/src/vendorcode/amd/pi/00660F01/Proc/Fch/Common/FchCommonCfg.h b/src/vendorcode/amd/pi/00660F01/Proc/Fch/Common/FchCommonCfg.h index 35a76d2..8c557bc 100644 --- a/src/vendorcode/amd/pi/00660F01/Proc/Fch/Common/FchCommonCfg.h +++ b/src/vendorcode/amd/pi/00660F01/Proc/Fch/Common/FchCommonCfg.h @@ -177,19 +177,19 @@
UINT8 AzaliaSdin1; ///< AzaliaSdin1 /// @par - /// SDIN1 is define at BIT2 & BIT3 + /// SDIN1 is defined at BIT2 & BIT3 /// @li <b>00</b> - GPIO PIN /// @li <b>10</b> - As a Azalia SDIN pin
UINT8 AzaliaSdin2; ///< AzaliaSdin2 /// @par - /// SDIN2 is define at BIT4 & BIT5 + /// SDIN2 is defined at BIT4 & BIT5 /// @li <b>00</b> - GPIO PIN /// @li <b>10</b> - As a Azalia SDIN pin
UINT8 AzaliaSdin3; ///< AzaliaSdin3 /// @par - /// SDIN3 is define at BIT6 & BIT7 + /// SDIN3 is defined at BIT6 & BIT7 /// @li <b>00</b> - GPIO PIN /// @li <b>10</b> - As a Azalia SDIN pin } AZALIA_PIN; diff --git a/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchCommonCfg.h b/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchCommonCfg.h index 21f73a3..6dcfb7e 100644 --- a/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchCommonCfg.h +++ b/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchCommonCfg.h @@ -182,19 +182,19 @@
UINT8 AzaliaSdin1; ///< AzaliaSdin1 /// @par - /// SDIN1 is define at BIT2 & BIT3 + /// SDIN1 is defined at BIT2 & BIT3 /// @li <b>00</b> - GPIO PIN /// @li <b>10</b> - As a Azalia SDIN pin
UINT8 AzaliaSdin2; ///< AzaliaSdin2 /// @par - /// SDIN2 is define at BIT4 & BIT5 + /// SDIN2 is defined at BIT4 & BIT5 /// @li <b>00</b> - GPIO PIN /// @li <b>10</b> - As a Azalia SDIN pin
UINT8 AzaliaSdin3; ///< AzaliaSdin3 /// @par - /// SDIN3 is define at BIT6 & BIT7 + /// SDIN3 is defined at BIT6 & BIT7 /// @li <b>00</b> - GPIO PIN /// @li <b>10</b> - As a Azalia SDIN pin } AZALIA_PIN; diff --git a/src/vendorcode/amd/pi/00730F01/Proc/Fch/Common/FchCommonCfg.h b/src/vendorcode/amd/pi/00730F01/Proc/Fch/Common/FchCommonCfg.h index 72e6aeb..f96dfdb 100644 --- a/src/vendorcode/amd/pi/00730F01/Proc/Fch/Common/FchCommonCfg.h +++ b/src/vendorcode/amd/pi/00730F01/Proc/Fch/Common/FchCommonCfg.h @@ -152,19 +152,19 @@
UINT8 AzaliaSdin1; ///< AzaliaSdin1 /// @par - /// SDIN1 is define at BIT2 & BIT3 + /// SDIN1 is defined at BIT2 & BIT3 /// @li <b>00</b> - GPIO PIN /// @li <b>10</b> - As a Azalia SDIN pin
UINT8 AzaliaSdin2; ///< AzaliaSdin2 /// @par - /// SDIN2 is define at BIT4 & BIT5 + /// SDIN2 is defined at BIT4 & BIT5 /// @li <b>00</b> - GPIO PIN /// @li <b>10</b> - As a Azalia SDIN pin
UINT8 AzaliaSdin3; ///< AzaliaSdin3 /// @par - /// SDIN3 is define at BIT6 & BIT7 + /// SDIN3 is defined at BIT6 & BIT7 /// @li <b>00</b> - GPIO PIN /// @li <b>10</b> - As a Azalia SDIN pin } AZALIA_PIN;
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