Change in coreboot[master]: soc/intel/elkhartlake: Update FSP-S UPD related configs part 3

[Werner Zeh (Code Review)]

Attention is currently required from: Maulik V Vaghela, Mario Scheithauer, Subrata Banik, Lean Sheng Tan, Patrick Rudolph.
Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55034 )

Change subject: soc/intel/elkhartlake: Update FSP-S UPD related configs part 3
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Patch Set 3: Code-Review+1

(3 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/55034/comment/a1b9c539_4f221d50 
PS2, Line 10: root ports
PCIe root ports

File src/mainboard/intel/elkhartlake_crb/variants/ehlcrb/devicetree.cb:

https://review.coreboot.org/c/coreboot/+/55034/comment/d0e3cd0e_72090c67 
PS2, Line 50: Root Ports
PCIe root ports

File src/soc/intel/elkhartlake/fsp_params.c:

https://review.coreboot.org/c/coreboot/+/55034/comment/694ca538_62798e10 
PS2, Line 215: RP Configs
PCIe root ports config