Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42941 )
Change subject: mb/google/zork: Drop unused/unnecessary GPIO macros ......................................................................
mb/google/zork: Drop unused/unnecessary GPIO macros
This change drops macros for GPIOs which are unused or don't really require extra indirection (same across all variants).
BUG=b:159283649
Signed-off-by: Furquan Shaikh furquan@google.com Change-Id: I1a94327103a419f26b1d7feda4c995363ada7281 --- M src/mainboard/google/zork/variants/baseboard/include/baseboard/gpio.h M src/mainboard/google/zork/variants/baseboard/tpm_tis.c 2 files changed, 2 insertions(+), 29 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/42941/1
diff --git a/src/mainboard/google/zork/variants/baseboard/include/baseboard/gpio.h b/src/mainboard/google/zork/variants/baseboard/include/baseboard/gpio.h index 4801a5e..84433e0 100644 --- a/src/mainboard/google/zork/variants/baseboard/include/baseboard/gpio.h +++ b/src/mainboard/google/zork/variants/baseboard/include/baseboard/gpio.h @@ -7,22 +7,6 @@ #include <soc/gpio.h> #include <platform_descriptors.h>
-#define H1_PCH_INT GPIO_3 -#define PEN_DETECT_ODL GPIO_4 -#define PEN_POWER_EN GPIO_5 -#define TOUCHPAD_INT_ODL GPIO_9 -#define EC_FCH_WAKE_L GPIO_24 -#define WIFI_PCIE_RESET_L GPIO_26 -#define PCIE_RST1_L GPIO_27 -#define EN_PWR_WIFI GPIO_29 -#define NVME_AUX_RESET_L GPIO_40 -#define WIFI_AUX_RESET_L GPIO_42 -#define EN_PWR_CAMERA GPIO_76 -#define EN_PWR_TOUCHPAD_PS2 GPIO_67 -#define PCIE_0_WIFI_CLKREQ_ODL GPIO_92 -#define PCIE_1_SD_CLKREQ_ODL GPIO_115 -#define BIOS_FLASH_WP_ODL GPIO_137 -#define SD_AUX_RESET_L GPIO_142 #define WLAN_CLKREQ CLK_REQ0 #define SD_CLKREQ CLK_REQ1
@@ -43,28 +27,17 @@ #endif
#if CONFIG(BOARD_GOOGLE_BASEBOARD_TREMBYLE) -#define FPMCU_INT_L GPIO_6 -#define FPMCU_RST_ODL GPIO_11 #define EC_IN_RW_OD GPIO_130 -#define PCIE_4_NVME_CLKREQ_ODL GPIO_132 #define NVME_CLKREQ CLK_REQ4 #else #define EC_IN_RW_OD GPIO_11 -#define PCIE_2_NVME_CLKREQ_ODL GPIO_116 #define NVME_CLKREQ CLK_REQ2 #endif
/* SPI Write protect */ -#define CROS_WP_GPIO BIOS_FLASH_WP_ODL +#define CROS_WP_GPIO GPIO_137 #define GPIO_EC_IN_RW EC_IN_RW_OD
-/* PCIe reset pins */ -#define PCIE_0_RST WIFI_AUX_RESET_L -#define PCIE_1_RST SD_AUX_RESET_L -#define PCIE_2_RST 0 -#define PCIE_3_RST 0 -#define PCIE_4_RST NVME_AUX_RESET_L - #endif /* _ACPI__ */
/* These define the GPE, not the GPIO. */ diff --git a/src/mainboard/google/zork/variants/baseboard/tpm_tis.c b/src/mainboard/google/zork/variants/baseboard/tpm_tis.c index 52e83cf..46952c3 100644 --- a/src/mainboard/google/zork/variants/baseboard/tpm_tis.c +++ b/src/mainboard/google/zork/variants/baseboard/tpm_tis.c @@ -6,5 +6,5 @@
int tis_plat_irq_status(void) { - return gpio_interrupt_status(H1_PCH_INT); + return gpio_interrupt_status(GPIO_3); }
Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42941 )
Change subject: mb/google/zork: Drop unused/unnecessary GPIO macros ......................................................................
Patch Set 1: Code-Review+2
Furquan Shaikh has submitted this change. ( https://review.coreboot.org/c/coreboot/+/42941 )
Change subject: mb/google/zork: Drop unused/unnecessary GPIO macros ......................................................................
mb/google/zork: Drop unused/unnecessary GPIO macros
This change drops macros for GPIOs which are unused or don't really require extra indirection (same across all variants).
BUG=b:159283649
Signed-off-by: Furquan Shaikh furquan@google.com Change-Id: I1a94327103a419f26b1d7feda4c995363ada7281 Reviewed-on: https://review.coreboot.org/c/coreboot/+/42941 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Aaron Durbin adurbin@chromium.org --- M src/mainboard/google/zork/variants/baseboard/include/baseboard/gpio.h M src/mainboard/google/zork/variants/baseboard/tpm_tis.c 2 files changed, 2 insertions(+), 29 deletions(-)
Approvals: build bot (Jenkins): Verified Aaron Durbin: Looks good to me, approved
diff --git a/src/mainboard/google/zork/variants/baseboard/include/baseboard/gpio.h b/src/mainboard/google/zork/variants/baseboard/include/baseboard/gpio.h index 4801a5e..84433e0 100644 --- a/src/mainboard/google/zork/variants/baseboard/include/baseboard/gpio.h +++ b/src/mainboard/google/zork/variants/baseboard/include/baseboard/gpio.h @@ -7,22 +7,6 @@ #include <soc/gpio.h> #include <platform_descriptors.h>
-#define H1_PCH_INT GPIO_3 -#define PEN_DETECT_ODL GPIO_4 -#define PEN_POWER_EN GPIO_5 -#define TOUCHPAD_INT_ODL GPIO_9 -#define EC_FCH_WAKE_L GPIO_24 -#define WIFI_PCIE_RESET_L GPIO_26 -#define PCIE_RST1_L GPIO_27 -#define EN_PWR_WIFI GPIO_29 -#define NVME_AUX_RESET_L GPIO_40 -#define WIFI_AUX_RESET_L GPIO_42 -#define EN_PWR_CAMERA GPIO_76 -#define EN_PWR_TOUCHPAD_PS2 GPIO_67 -#define PCIE_0_WIFI_CLKREQ_ODL GPIO_92 -#define PCIE_1_SD_CLKREQ_ODL GPIO_115 -#define BIOS_FLASH_WP_ODL GPIO_137 -#define SD_AUX_RESET_L GPIO_142 #define WLAN_CLKREQ CLK_REQ0 #define SD_CLKREQ CLK_REQ1
@@ -43,28 +27,17 @@ #endif
#if CONFIG(BOARD_GOOGLE_BASEBOARD_TREMBYLE) -#define FPMCU_INT_L GPIO_6 -#define FPMCU_RST_ODL GPIO_11 #define EC_IN_RW_OD GPIO_130 -#define PCIE_4_NVME_CLKREQ_ODL GPIO_132 #define NVME_CLKREQ CLK_REQ4 #else #define EC_IN_RW_OD GPIO_11 -#define PCIE_2_NVME_CLKREQ_ODL GPIO_116 #define NVME_CLKREQ CLK_REQ2 #endif
/* SPI Write protect */ -#define CROS_WP_GPIO BIOS_FLASH_WP_ODL +#define CROS_WP_GPIO GPIO_137 #define GPIO_EC_IN_RW EC_IN_RW_OD
-/* PCIe reset pins */ -#define PCIE_0_RST WIFI_AUX_RESET_L -#define PCIE_1_RST SD_AUX_RESET_L -#define PCIE_2_RST 0 -#define PCIE_3_RST 0 -#define PCIE_4_RST NVME_AUX_RESET_L - #endif /* _ACPI__ */
/* These define the GPE, not the GPIO. */ diff --git a/src/mainboard/google/zork/variants/baseboard/tpm_tis.c b/src/mainboard/google/zork/variants/baseboard/tpm_tis.c index 52e83cf..46952c3 100644 --- a/src/mainboard/google/zork/variants/baseboard/tpm_tis.c +++ b/src/mainboard/google/zork/variants/baseboard/tpm_tis.c @@ -6,5 +6,5 @@
int tis_plat_irq_status(void) { - return gpio_interrupt_status(H1_PCH_INT); + return gpio_interrupt_status(GPIO_3); }
-
Aaron Durbin (Code Review) -
Furquan Shaikh (Code Review)