Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45974 )
Change subject: configs: Add a weird config for Portwell M107 ......................................................................
configs: Add a weird config for Portwell M107
This is not meant for actual use, but to build-test several options. Please do not try to use it on real hardware. Or maybe do try.
Change-Id: Ife40d055e4c9b295c54cfc6a27af06e9358f7761 Signed-off-by: Angel Pons th3fanbus@gmail.com --- A configs/config.portwell_m107.debug_smmstore_oxpcie_em100spi 1 file changed, 38 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/45974/1
diff --git a/configs/config.portwell_m107.debug_smmstore_oxpcie_em100spi b/configs/config.portwell_m107.debug_smmstore_oxpcie_em100spi new file mode 100644 index 0000000..448193d --- /dev/null +++ b/configs/config.portwell_m107.debug_smmstore_oxpcie_em100spi @@ -0,0 +1,38 @@ +# Not meant for actual use. Exercises, among other things: +# + SMMSTORE +# + OXPCIE support +# + FSP MP init +# + EM100Pro SPI console +# + Debug options +CONFIG_VENDOR_PORTWELL=y +CONFIG_CONSOLE_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_ENABLE_BUILTIN_COM1=y +CONFIG_ONBOARD_MEM_KINGSTON=y +CONFIG_USE_INTEL_FSP_MP_INIT=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE=y +CONFIG_SOC_INTEL_DEBUG_CONSENT=y +CONFIG_PCIEXP_HOTPLUG=y +CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G=y +CONFIG_SOFTWARE_I2C=y +CONFIG_SMMSTORE=y +CONFIG_SPI_FLASH_NO_FAST_READ=y +CONFIG_DRIVERS_UART_OXPCIE=y +CONFIG_DRIVERS_GENESYSLOGIC_GL9755=y +CONFIG_DISPLAY_HOBS=y +CONFIG_DISPLAY_VBT=y +CONFIG_DISPLAY_FSP_ENTRY_POINTS=y +CONFIG_DISPLAY_UPD_DATA=y +CONFIG_EM100PRO_SPI_CONSOLE=y +CONFIG_DISPLAY_MTRRS=y +CONFIG_GDB_STUB=y +CONFIG_GDB_WAIT=y +CONFIG_FATAL_ASSERTS=y +CONFIG_DEBUG_CBFS=y +CONFIG_DEBUG_SMBUS=y +CONFIG_DEBUG_SMI=y +CONFIG_DEBUG_PERIODIC_SMI=y +CONFIG_DEBUG_MALLOC=y +CONFIG_DEBUG_CONSOLE_INIT=y +CONFIG_REALMODE_DEBUG=y +CONFIG_DEBUG_BOOT_STATE=y
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45974 )
Change subject: configs: Add a weird config for Portwell M107 ......................................................................
Patch Set 1: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/45974/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/45974/1//COMMIT_MSG@10 PS1, Line 10: Please do not try to use it on real hardware. Or maybe do try. I'm generally ok with it, but we should define that this is only to build test the individual options, not their combination. So, for instance, if it would be hard to keep options x, y and z build together in the future, this config shouldn't block a change but should be adapted.
Frans Hendriks has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45974 )
Change subject: configs: Add a weird config for Portwell M107 ......................................................................
Patch Set 1:
FYI: Tried on real HW.
OXPCIE support conflict with UART support. Disabling OXPCIE result into binary which boots till postcar continuous displaying `$S02#b5`.
Frans Hendriks has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45974 )
Change subject: configs: Add a weird config for Portwell M107 ......................................................................
Patch Set 1: Code-Review+1
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45974 )
Change subject: configs: Add a weird config for Portwell M107 ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45974/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/45974/1//COMMIT_MSG@10 PS1, Line 10: Please do not try to use it on real hardware. Or maybe do try.
I'm generally ok with it, but we should define that this is only […]
Alright. Will update the existing B85M Pro4 config to reflect that and then update this too
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45974 )
Change subject: configs: Add a weird config for Portwell M107 ......................................................................
Patch Set 1:
Patch Set 1:
FYI: Tried on real HW.
OXPCIE support conflict with UART support. Disabling OXPCIE result into binary which boots till postcar continuous displaying `$S02#b5`.
Interesting. I didn't expect anyone to actually boot-test that 😄
Hello build bot (Jenkins), Nico Huber, Frans Hendriks, Wim Vervoorn,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/45974
to look at the new patch set (#2).
Change subject: configs: Add a weird config for Portwell M107 ......................................................................
configs: Add a weird config for Portwell M107
This is not meant for actual use, but to build-test several options. Please do not try to use it on real hardware. Or maybe do try.
The purpose of this config is to build-test the individual options, not their combination. So, for instance, if it would be hard to keep options x, y and z build together in the future, this config shouldn't block a change but should instead be adapted, e.g. split into multiple chunks.
Change-Id: Ife40d055e4c9b295c54cfc6a27af06e9358f7761 Signed-off-by: Angel Pons th3fanbus@gmail.com --- A configs/config.portwell_m107.debug_smmstore_oxpcie_em100spi 1 file changed, 41 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/45974/2
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45974 )
Change subject: configs: Add a weird config for Portwell M107 ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/45974/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/45974/1//COMMIT_MSG@10 PS1, Line 10: Please do not try to use it on real hardware. Or maybe do try.
Alright. […]
Done
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45974 )
Change subject: configs: Add a weird config for Portwell M107 ......................................................................
Patch Set 2: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/45974 )
Change subject: configs: Add a weird config for Portwell M107 ......................................................................
configs: Add a weird config for Portwell M107
This is not meant for actual use, but to build-test several options. Please do not try to use it on real hardware. Or maybe do try.
The purpose of this config is to build-test the individual options, not their combination. So, for instance, if it would be hard to keep options x, y and z build together in the future, this config shouldn't block a change but should instead be adapted, e.g. split into multiple chunks.
Change-Id: Ife40d055e4c9b295c54cfc6a27af06e9358f7761 Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/45974 Reviewed-by: Nico Huber nico.h@gmx.de Tested-by: build bot (Jenkins) no-reply@coreboot.org --- A configs/config.portwell_m107.debug_smmstore_oxpcie_em100spi 1 file changed, 41 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved
diff --git a/configs/config.portwell_m107.debug_smmstore_oxpcie_em100spi b/configs/config.portwell_m107.debug_smmstore_oxpcie_em100spi new file mode 100644 index 0000000..09dfbe3 --- /dev/null +++ b/configs/config.portwell_m107.debug_smmstore_oxpcie_em100spi @@ -0,0 +1,41 @@ +# Not meant for actual use, but rather to build-test individual options. +# If keeping this combination of options buildable becomes too hard in +# the future, then this config can be split into several smaller chunks. +# Exercises, among other things: +# + SMMSTORE +# + OXPCIE support +# + FSP MP init +# + EM100Pro SPI console +# + Debug options +CONFIG_VENDOR_PORTWELL=y +CONFIG_CONSOLE_POST=y +# CONFIG_CONSOLE_SERIAL is not set +CONFIG_ENABLE_BUILTIN_COM1=y +CONFIG_ONBOARD_MEM_KINGSTON=y +CONFIG_USE_INTEL_FSP_MP_INIT=y +CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE=y +CONFIG_SOC_INTEL_DEBUG_CONSENT=y +CONFIG_PCIEXP_HOTPLUG=y +CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G=y +CONFIG_SOFTWARE_I2C=y +CONFIG_SMMSTORE=y +CONFIG_SPI_FLASH_NO_FAST_READ=y +CONFIG_DRIVERS_UART_OXPCIE=y +CONFIG_DRIVERS_GENESYSLOGIC_GL9755=y +CONFIG_DISPLAY_HOBS=y +CONFIG_DISPLAY_VBT=y +CONFIG_DISPLAY_FSP_ENTRY_POINTS=y +CONFIG_DISPLAY_UPD_DATA=y +CONFIG_EM100PRO_SPI_CONSOLE=y +CONFIG_DISPLAY_MTRRS=y +CONFIG_GDB_STUB=y +CONFIG_GDB_WAIT=y +CONFIG_FATAL_ASSERTS=y +CONFIG_DEBUG_CBFS=y +CONFIG_DEBUG_SMBUS=y +CONFIG_DEBUG_SMI=y +CONFIG_DEBUG_PERIODIC_SMI=y +CONFIG_DEBUG_MALLOC=y +CONFIG_DEBUG_CONSOLE_INIT=y +CONFIG_REALMODE_DEBUG=y +CONFIG_DEBUG_BOOT_STATE=y