[XS] Change in coreboot[master]: soc/intel/alderlake: Add enable PCH FIVR entry - coreboot-gerrit

7 Aug 2023


      Martin L Roth has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/58140?usp=email )
Change subject: soc/intel/alderlake: Add enable PCH FIVR entry
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Abandoned
This patch has not been touched in over 12 months. Anyone who wants to take over work on this patch, please feel free to restore it and do any work needed to get it merged. If you create a new patch based on this work, please credit the original author.
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I570ef5a741fa96efaee0457815f4ef9808edb10d
Gerrit-Change-Number: 58140
Gerrit-PatchSet: 1
Gerrit-Owner: Sumeet R Pawnikar sumeet.r.pawnikar@intel.com
Gerrit-Reviewer: Furquan Shaikh furquan.m.shaikh@gmail.com
Gerrit-Reviewer: Karthik Ramasubramanian kramasub@google.com
Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org
Gerrit-Reviewer: Tim Wawrzynczak inforichland@gmail.com
Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org
Gerrit-CC: Martin L Roth gaumless@gmail.com
Gerrit-MessageType: abandon