Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29470 )
Change subject: mainboard/portwell/m107: Do initial mainboard commit ......................................................................
Patch Set 11:
(2 comments)
https://review.coreboot.org/#/c/29470/11/src/mainboard/portwell/m107/Kconfig File src/mainboard/portwell/m107/Kconfig:
https://review.coreboot.org/#/c/29470/11/src/mainboard/portwell/m107/Kconfig... PS11, Line 30: choice
There are not GPIO or other possibility to be used to determine the memory type. […]
This line https://review.coreboot.org/c/coreboot/+/29470/11/src/mainboard/portwell/m10... says RAMID 2, so I deducted there is a way to determine memory option.
https://review.coreboot.org/#/c/29470/11/src/mainboard/portwell/m107/com_ini... File src/mainboard/portwell/m107/com_init.c:
https://review.coreboot.org/#/c/29470/11/src/mainboard/portwell/m107/com_ini... PS11, Line 24: void car_mainboard_pre_console_init(void)
The UART needs to be configured here as early as possible. […]
It can be also used to disable the onboard UART and enable the SuperIO UART in one sway. I am not suggesting to remove the SuperIO UART configuration. Since You are already configuring the UART in bootblock, it may be necessary to reenable it in mainboard_after_memory_init in order to not loose any console output. In my case (with other board) I had to do so, because disabling the onboard UART port was not enough. What I suggest is to rename car_mainboard_pre_console_init to mainboard_after_memory_init and add also the code to disable the onboard UART in order to not loose any console.