Kane Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32297
Change subject: soc/intel/cannonlake: Enable PlatformDebugConsent by Kconfig ......................................................................
soc/intel/cannonlake: Enable PlatformDebugConsent by Kconfig
This change is mainly to control PlatformDebugConsent FSP UPD. If CONFIG_USE_DBC_CANNONLAKE=y, the PlatformDebugConsent be enabled.
BUG=b:130203864 TEST=boot ok and PlatformDebugConsent can be controlled by Kconfig
Change-Id: Ib845b5e42bc78fb352a0c97c6301f2aeca522f29 Signed-off-by: Kane Chen kane.chen@intel.com --- M src/soc/intel/cannonlake/Kconfig M src/soc/intel/cannonlake/romstage/fsp_params.c 2 files changed, 8 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/32297/1
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index 9796546..bcd3f30 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -289,4 +289,7 @@ depends on FSP_USE_REPO default "3rdparty/fsp/CoffeeLakeFspBinPkg/Fsp.fd" if SOC_INTEL_COFFEELAKE || SOC_INTEL_WHISKEYLAKE
+config USE_DBC_CANNONLAKE + bool "Support USB DBC for Cannonlake" + endif diff --git a/src/soc/intel/cannonlake/romstage/fsp_params.c b/src/soc/intel/cannonlake/romstage/fsp_params.c index ffdcee4..53040ff 100644 --- a/src/soc/intel/cannonlake/romstage/fsp_params.c +++ b/src/soc/intel/cannonlake/romstage/fsp_params.c @@ -111,8 +111,12 @@ m_cfg->SmbusEnable = 0; else m_cfg->SmbusEnable = smbus->enabled; + /* Set debug probe type */ - m_cfg->PlatformDebugConsent = config->DebugConsent; + if (CONFIG(USE_DBC_CANNONLAKE)) + m_cfg->PlatformDebugConsent = DebugConsent_USB3_DBC; + else + m_cfg->PlatformDebugConsent = config->DebugConsent;
mainboard_memory_init_params(mupd); }
Hello Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/32297
to look at the new patch set (#2).
Change subject: soc/intel/cannonlake: Enable PlatformDebugConsent by Kconfig ......................................................................
soc/intel/cannonlake: Enable PlatformDebugConsent by Kconfig
This change is mainly to control PlatformDebugConsent FSP UPD. If CONFIG_USE_DBC_CANNONLAKE=y, the PlatformDebugConsent is enabled.
BUG=b:130203864 TEST=boot ok and PlatformDebugConsent can be controlled by Kconfig
Change-Id: Ib845b5e42bc78fb352a0c97c6301f2aeca522f29 Signed-off-by: Kane Chen kane.chen@intel.com --- M src/soc/intel/cannonlake/Kconfig M src/soc/intel/cannonlake/romstage/fsp_params.c 2 files changed, 8 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/32297/2
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32297 )
Change subject: soc/intel/cannonlake: Enable PlatformDebugConsent by Kconfig ......................................................................
Patch Set 2:
(2 comments)
https://review.coreboot.org/#/c/32297/2/src/soc/intel/cannonlake/Kconfig File src/soc/intel/cannonlake/Kconfig:
https://review.coreboot.org/#/c/32297/2/src/soc/intel/cannonlake/Kconfig@293 PS2, Line 293: bool "Support USB DBC for Cannonlake" Please explain in a help text what this is and how to use it.
https://review.coreboot.org/#/c/32297/2/src/soc/intel/cannonlake/romstage/fs... File src/soc/intel/cannonlake/romstage/fsp_params.c:
https://review.coreboot.org/#/c/32297/2/src/soc/intel/cannonlake/romstage/fs... PS2, Line 119: m_cfg->PlatformDebugConsent = config->DebugConsent; Please no competing options in Kconfig and `chip.h`. I guess you can remove the one from `chip.h`? why would we ever want to set this in the devicetree?
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32297 )
Change subject: soc/intel/cannonlake: Enable PlatformDebugConsent by Kconfig ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/#/c/32297/2/src/soc/intel/cannonlake/romstage/fs... File src/soc/intel/cannonlake/romstage/fsp_params.c:
https://review.coreboot.org/#/c/32297/2/src/soc/intel/cannonlake/romstage/fs... PS2, Line 119: m_cfg->PlatformDebugConsent = config->DebugConsent;
Please no competing options in Kconfig and `chip.h`. I guess you can […]
If we need to get rid of the devicetree option, USE_DBC_CANNONLAKE will have to instead be a choice in Kconfig.
Hello Patrick Rudolph, build bot (Jenkins), Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/32297
to look at the new patch set (#3).
Change subject: soc/intel/cannonlake: Enable PlatformDebugConsent by Kconfig ......................................................................
soc/intel/cannonlake: Enable PlatformDebugConsent by Kconfig
This change is mainly to control PlatformDebugConsent FSP UPD. If CONFIG_USE_DBC_CANNONLAKE=y, the PlatformDebugConsent is enabled.
BUG=b:130203864 TEST=boot ok and PlatformDebugConsent can be controlled by Kconfig
Change-Id: Ib845b5e42bc78fb352a0c97c6301f2aeca522f29 Signed-off-by: Kane Chen kane.chen@intel.com --- M src/soc/intel/cannonlake/Kconfig M src/soc/intel/cannonlake/romstage/fsp_params.c 2 files changed, 10 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/32297/3
Hello Patrick Rudolph, build bot (Jenkins), Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/32297
to look at the new patch set (#4).
Change subject: soc/intel/cannonlake: Enable PlatformDebugConsent by Kconfig ......................................................................
soc/intel/cannonlake: Enable PlatformDebugConsent by Kconfig
This change is mainly to control PlatformDebugConsent FSP UPD. If CONFIG_USE_DBC_CANNONLAKE=y, the PlatformDebugConsent is enabled.
BUG=b:130203864 TEST=boot ok and PlatformDebugConsent can be controlled by Kconfig
Change-Id: Ib845b5e42bc78fb352a0c97c6301f2aeca522f29 Signed-off-by: Kane Chen kane.chen@intel.com --- M src/soc/intel/cannonlake/Kconfig M src/soc/intel/cannonlake/romstage/fsp_params.c 2 files changed, 10 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/32297/4
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32297 )
Change subject: soc/intel/cannonlake: Enable PlatformDebugConsent by Kconfig ......................................................................
Patch Set 4:
(2 comments)
https://review.coreboot.org/#/c/32297/4//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/32297/4//COMMIT_MSG@10 PS4, Line 10: y not true anymore.
https://review.coreboot.org/#/c/32297/4/src/soc/intel/cannonlake/romstage/fs... File src/soc/intel/cannonlake/romstage/fsp_params.c:
https://review.coreboot.org/#/c/32297/4/src/soc/intel/cannonlake/romstage/fs... PS4, Line 115: Get rid of this too: https://review.coreboot.org/cgit/coreboot.git/tree/src/soc/intel/cannonlake/...
Hello Patrick Rudolph, build bot (Jenkins), Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/32297
to look at the new patch set (#5).
Change subject: soc/intel/cannonlake: Enable PlatformDebugConsent by Kconfig ......................................................................
soc/intel/cannonlake: Enable PlatformDebugConsent by Kconfig
This change is mainly to control PlatformDebugConsent FSP UPD. PlatformDebugConsent is enabled if DEBUG_CONSENT_CANNONLAKE != 0. PlatformDebugConsent in FspmUpd.h has the details
BUG=b:130203864 TEST=boot ok and PlatformDebugConsent can be controlled by Kconfig
Change-Id: Ib845b5e42bc78fb352a0c97c6301f2aeca522f29 Signed-off-by: Kane Chen kane.chen@intel.com --- M src/soc/intel/cannonlake/Kconfig M src/soc/intel/cannonlake/chip.h M src/soc/intel/cannonlake/romstage/fsp_params.c 3 files changed, 10 insertions(+), 11 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/32297/5
Kane Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32297 )
Change subject: soc/intel/cannonlake: Enable PlatformDebugConsent by Kconfig ......................................................................
Patch Set 5:
(2 comments)
https://review.coreboot.org/#/c/32297/4//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/32297/4//COMMIT_MSG@10 PS4, Line 10: y
not true anymore.
done. thank you
https://review.coreboot.org/#/c/32297/4/src/soc/intel/cannonlake/romstage/fs... File src/soc/intel/cannonlake/romstage/fsp_params.c:
https://review.coreboot.org/#/c/32297/4/src/soc/intel/cannonlake/romstage/fs... PS4, Line 115:
Get rid of this too: https://review.coreboot.org/cgit/coreboot. […]
done thank you
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32297 )
Change subject: soc/intel/cannonlake: Enable PlatformDebugConsent by Kconfig ......................................................................
Patch Set 5: Code-Review+2
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32297 )
Change subject: soc/intel/cannonlake: Enable PlatformDebugConsent by Kconfig ......................................................................
Patch Set 5: Code-Review+2
(4 comments)
https://review.coreboot.org/#/c/32297/4//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/32297/4//COMMIT_MSG@10 PS4, Line 10: y
done. […]
Ack
https://review.coreboot.org/#/c/32297/2/src/soc/intel/cannonlake/Kconfig File src/soc/intel/cannonlake/Kconfig:
https://review.coreboot.org/#/c/32297/2/src/soc/intel/cannonlake/Kconfig@293 PS2, Line 293: bool "Support USB DBC for Cannonlake"
Please explain in a help text what this is and how to use it.
Done
https://review.coreboot.org/#/c/32297/2/src/soc/intel/cannonlake/romstage/fs... File src/soc/intel/cannonlake/romstage/fsp_params.c:
https://review.coreboot.org/#/c/32297/2/src/soc/intel/cannonlake/romstage/fs... PS2, Line 119: m_cfg->PlatformDebugConsent = config->DebugConsent;
If we need to get rid of the devicetree option, USE_DBC_CANNONLAKE will have to instead be a choice […]
Done
https://review.coreboot.org/#/c/32297/4/src/soc/intel/cannonlake/romstage/fs... File src/soc/intel/cannonlake/romstage/fsp_params.c:
https://review.coreboot.org/#/c/32297/4/src/soc/intel/cannonlake/romstage/fs... PS4, Line 115:
done […]
Ack
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32297 )
Change subject: soc/intel/cannonlake: Enable PlatformDebugConsent by Kconfig ......................................................................
Patch Set 5:
(3 comments)
https://review.coreboot.org/#/c/32297/5/src/soc/intel/cannonlake/Kconfig File src/soc/intel/cannonlake/Kconfig:
https://review.coreboot.org/#/c/32297/5/src/soc/intel/cannonlake/Kconfig@296 PS5, Line 296: control debug interface DCI? debug control interface?
https://review.coreboot.org/#/c/32297/5/src/soc/intel/cannonlake/Kconfig@298 PS5, Line 298: PlatformDebugConsent in FspmUpd.h has the details Please add a dot/period at the end.
https://review.coreboot.org/#/c/32297/5/src/soc/intel/cannonlake/Kconfig@296 PS5, Line 296: This is to control debug interface on SOC. : Setting non-zero value will allow to use DBC or DCI to debug SOC. : PlatformDebugConsent in FspmUpd.h has the details Please add a blank line between paragraphs or use the full text width.
Furquan Shaikh has removed a vote on this change.
Change subject: soc/intel/cannonlake: Enable PlatformDebugConsent by Kconfig ......................................................................
Removed Code-Review+2 by Furquan Shaikh furquan@google.com
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32297 )
Change subject: soc/intel/cannonlake: Enable PlatformDebugConsent by Kconfig ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/#/c/32297/5/src/soc/intel/cannonlake/Kconfig File src/soc/intel/cannonlake/Kconfig:
https://review.coreboot.org/#/c/32297/5/src/soc/intel/cannonlake/Kconfig@292 PS5, Line 292: DEBUG_CONSENT_CANNONLAKE You can rename this to SOC_INTEL_CANNONLAKE_DEBUG_CONSENT and set it to 3 if CHROMEOS and SOC_INTEL_DEBUG_CONSENT are selected.
Hello Patrick Rudolph, build bot (Jenkins), Nico Huber, Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/32297
to look at the new patch set (#6).
Change subject: soc/intel/cannonlake: Enable PlatformDebugConsent by Kconfig ......................................................................
soc/intel/cannonlake: Enable PlatformDebugConsent by Kconfig
This change is mainly to control PlatformDebugConsent FSP UPD. PlatformDebugConsent is enabled if SOC_INTEL_CANNONLAKE_DEBUG_CONSENT != 0. PlatformDebugConsent in FspmUpd.h has the details.
BUG=b:130203864 TEST=boot ok and PlatformDebugConsent can be controlled by Kconfig
Change-Id: Ib845b5e42bc78fb352a0c97c6301f2aeca522f29 Signed-off-by: Kane Chen kane.chen@intel.com --- M src/soc/intel/cannonlake/Kconfig M src/soc/intel/cannonlake/chip.h M src/soc/intel/cannonlake/romstage/fsp_params.c 3 files changed, 12 insertions(+), 11 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/32297/6
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32297 )
Change subject: soc/intel/cannonlake: Enable PlatformDebugConsent by Kconfig ......................................................................
Patch Set 6:
(1 comment)
https://review.coreboot.org/#/c/32297/6/src/soc/intel/cannonlake/romstage/fs... File src/soc/intel/cannonlake/romstage/fsp_params.c:
https://review.coreboot.org/#/c/32297/6/src/soc/intel/cannonlake/romstage/fs... PS6, Line 116: m_cfg->PlatformDebugConsent = \ Avoid unnecessary line continuations
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32297 )
Change subject: soc/intel/cannonlake: Enable PlatformDebugConsent by Kconfig ......................................................................
Patch Set 7:
(1 comment)
https://review.coreboot.org/#/c/32297/7/src/soc/intel/cannonlake/romstage/fs... File src/soc/intel/cannonlake/romstage/fsp_params.c:
https://review.coreboot.org/#/c/32297/7/src/soc/intel/cannonlake/romstage/fs... PS7, Line 116: m_cfg->PlatformDebugConsent = \ Avoid unnecessary line continuations
Kane Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32297 )
Change subject: soc/intel/cannonlake: Enable PlatformDebugConsent by Kconfig ......................................................................
Patch Set 7:
(1 comment)
https://review.coreboot.org/#/c/32297/7/src/soc/intel/cannonlake/romstage/fs... File src/soc/intel/cannonlake/romstage/fsp_params.c:
https://review.coreboot.org/#/c/32297/7/src/soc/intel/cannonlake/romstage/fs... PS7, Line 116: m_cfg->PlatformDebugConsent = \
Avoid unnecessary line continuations
if i don't do this, it will be over 80 char
Kane Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32297 )
Change subject: soc/intel/cannonlake: Enable PlatformDebugConsent by Kconfig ......................................................................
Patch Set 7:
(1 comment)
https://review.coreboot.org/#/c/32297/7/src/soc/intel/cannonlake/Kconfig File src/soc/intel/cannonlake/Kconfig:
https://review.coreboot.org/#/c/32297/7/src/soc/intel/cannonlake/Kconfig@305 PS7, Line 305: default 3 if SOC_INTEL_DEBUG_CONSENT The reason i didn't put CHROMEOS as a dependency here is i think USB DBC is more common for developers. thanks.
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32297 )
Change subject: soc/intel/cannonlake: Enable PlatformDebugConsent by Kconfig ......................................................................
Patch Set 7:
(2 comments)
https://review.coreboot.org/#/c/32297/7/src/soc/intel/cannonlake/Kconfig File src/soc/intel/cannonlake/Kconfig:
https://review.coreboot.org/#/c/32297/7/src/soc/intel/cannonlake/Kconfig@305 PS7, Line 305: default 3 if SOC_INTEL_DEBUG_CONSENT
The reason i didn't put CHROMEOS as a dependency here is i think USB DBC is more common for develope […]
SG. Can you add a comment here that the default debug interface is DBC?
https://review.coreboot.org/#/c/32297/7/src/soc/intel/cannonlake/romstage/fs... File src/soc/intel/cannonlake/romstage/fsp_params.c:
https://review.coreboot.org/#/c/32297/7/src/soc/intel/cannonlake/romstage/fs... PS7, Line 116: m_cfg->PlatformDebugConsent = \
if i don't do this, it will be over 80 char
I don't think you need a '' to put CONFIG_SOC_INTEL_CANNONLAKE_DEBUG_CONSENT on the next line.
Hello Patrick Rudolph, build bot (Jenkins), Nico Huber, Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/32297
to look at the new patch set (#8).
Change subject: soc/intel/cannonlake: Enable PlatformDebugConsent by Kconfig ......................................................................
soc/intel/cannonlake: Enable PlatformDebugConsent by Kconfig
This change is mainly to control PlatformDebugConsent FSP UPD. PlatformDebugConsent is enabled if SOC_INTEL_CANNONLAKE_DEBUG_CONSENT != 0. PlatformDebugConsent in FspmUpd.h has the details.
BUG=b:130203864 TEST=boot ok and PlatformDebugConsent can be controlled by Kconfig
Change-Id: Ib845b5e42bc78fb352a0c97c6301f2aeca522f29 Signed-off-by: Kane Chen kane.chen@intel.com --- M src/soc/intel/cannonlake/Kconfig M src/soc/intel/cannonlake/chip.h M src/soc/intel/cannonlake/romstage/fsp_params.c 3 files changed, 14 insertions(+), 11 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/32297/8
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32297 )
Change subject: soc/intel/cannonlake: Enable PlatformDebugConsent by Kconfig ......................................................................
Patch Set 8: Code-Review+2
Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/32297 )
Change subject: soc/intel/cannonlake: Enable PlatformDebugConsent by Kconfig ......................................................................
soc/intel/cannonlake: Enable PlatformDebugConsent by Kconfig
This change is mainly to control PlatformDebugConsent FSP UPD. PlatformDebugConsent is enabled if SOC_INTEL_CANNONLAKE_DEBUG_CONSENT != 0. PlatformDebugConsent in FspmUpd.h has the details.
BUG=b:130203864 TEST=boot ok and PlatformDebugConsent can be controlled by Kconfig
Change-Id: Ib845b5e42bc78fb352a0c97c6301f2aeca522f29 Signed-off-by: Kane Chen kane.chen@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/32297 Reviewed-by: Furquan Shaikh furquan@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/intel/cannonlake/Kconfig M src/soc/intel/cannonlake/chip.h M src/soc/intel/cannonlake/romstage/fsp_params.c 3 files changed, 14 insertions(+), 11 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index 40b40d6..6af05c8 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -292,4 +292,15 @@ depends on FSP_USE_REPO default "3rdparty/fsp/CoffeeLakeFspBinPkg/Fsp.fd" if SOC_INTEL_COFFEELAKE || SOC_INTEL_WHISKEYLAKE
+config SOC_INTEL_CANNONLAKE_DEBUG_CONSENT + int "Debug Consent for CNL" + # USB DBC is more common for developers so make this default to 3 if + # SOC_INTEL_DEBUG_CONSENT=y + default 3 if SOC_INTEL_DEBUG_CONSENT + default 0 + help + This is to control debug interface on SOC. + Setting non-zero value will allow to use DBC or DCI to debug SOC. + PlatformDebugConsent in FspmUpd.h has the details. + endif diff --git a/src/soc/intel/cannonlake/chip.h b/src/soc/intel/cannonlake/chip.h index 58b540c..9bba226 100644 --- a/src/soc/intel/cannonlake/chip.h +++ b/src/soc/intel/cannonlake/chip.h @@ -292,15 +292,6 @@ */ uint8_t PchPmSlpAMinAssert;
- /* Desired platform debug type. */ - enum { - DebugConsent_Disabled, - DebugConsent_DCI_DBC, - DebugConsent_DCI, - DebugConsent_USB3_DBC, - DebugConsent_XDP, /* XDP/Mipi60 */ - DebugConsent_USB2_DBC, - } DebugConsent; /* * SerialIO device mode selection: * diff --git a/src/soc/intel/cannonlake/romstage/fsp_params.c b/src/soc/intel/cannonlake/romstage/fsp_params.c index 86160f6..ce58638 100644 --- a/src/soc/intel/cannonlake/romstage/fsp_params.c +++ b/src/soc/intel/cannonlake/romstage/fsp_params.c @@ -108,9 +108,10 @@ m_cfg->SmbusEnable = 0; else m_cfg->SmbusEnable = smbus->enabled; - /* Set debug probe type */ - m_cfg->PlatformDebugConsent = config->DebugConsent;
+ /* Set debug probe type */ + m_cfg->PlatformDebugConsent = + CONFIG_SOC_INTEL_CANNONLAKE_DEBUG_CONSENT; mainboard_memory_init_params(mupd); }