Change in coreboot[master]: soc/intel/graphics: Create Kconfig for mapping graphic memory base
Attention is currently required from: Nico Huber, Wonkyu Kim, Ethan Tsao, Ravishankar Sarawadi, Tim Wawrzynczak, Paul Menzel, Raj Astekar, Patrick Rudolph. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61389 )
Change subject: soc/intel/graphics: Create Kconfig for mapping graphic memory base ......................................................................
Patch Set 17:
(1 comment)
File src/soc/intel/common/block/graphics/graphics.c:
https://review.coreboot.org/c/coreboot/+/61389/comment/d082cc13_1422fbe2 PS13, Line 128: memory_base = memory_base + CONFIG_SOC_INTEL_GFX_MEMBASE_OFFSET;
GTT size is considered in CONFIG_SOC_INTEL_GFX_MEMBASE_OFFSET. So, just constant offset should be fine for now as we're working on fixed GTT size; FSP will be updated for this.
If we need to support flexible size in total offset in future, we may need to update calculation later.
@Will, I had an impression that we are planning to read GTT size from PCI config register and didn't realised that you have planned to sent the (GTT size + fixed offset) as part of Kconfig. Please note, Kconfig can't do math (I believe so), so you might need to ensure the value passes to FSP UPD is align with Kconfig calculation. Example: if you decides to pass GTT size as 8MB using config devicetree.cb variable then new Kconfig should have 8MB + offiset. Now, if someone overrides 8MB to 4MB in .cb file should need to make sure that Kconfig is also updated.
-
Subrata Banik (Code Review)