Change in coreboot[master]: mb/google/octopus: Fix invalid IOSSTATE settings for 1.8V pins
Shamile Khan has uploaded this change for review. ( https://review.coreboot.org/26762
Change subject: mb/google/octopus: Fix invalid IOSSTATE settings for 1.8V pins ......................................................................
mb/google/octopus: Fix invalid IOSSTATE settings for 1.8V pins
When the normal termination is None, the standby termination is none also as per Doc# 572688. So when termination is only needed in standby, use the IOSSTATE setting that drives low/high via the Tx mode instead.
Also disable Bluetooth and Speaker in Standby state.
BUG=b:79874891, b:79982669 BRANCH=None TEST=Compiled and flashed image on Bip. Checked that suspend_resume cycles pass. Checked that bluetooth is functional on resume.
Change-Id: I6a3852548f944176a80feb32e9885b03b8af25db Signed-off-by: Shamile Khan shamile.khan@intel.com --- M src/mainboard/google/octopus/variants/baseboard/gpio.c M src/mainboard/google/octopus/variants/bip/gpio.c 2 files changed, 14 insertions(+), 14 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/26762/1
diff --git a/src/mainboard/google/octopus/variants/baseboard/gpio.c b/src/mainboard/google/octopus/variants/baseboard/gpio.c index f839850..394d08d 100644 --- a/src/mainboard/google/octopus/variants/baseboard/gpio.c +++ b/src/mainboard/google/octopus/variants/baseboard/gpio.c @@ -80,8 +80,8 @@ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_51, NONE, DEEP, NF1, HIZCRx1, DISPUPD), /* LPSS_I2C0_SCL */ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_52, NONE, DEEP, NF1, HIZCRx1, DISPUPD), /* LPSS_I2C1_SDA */ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_53, NONE, DEEP, NF1, HIZCRx1, DISPUPD), /* LPSS_I2C1_SCL */ - PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_54, 0, DEEP, NONE, HIZCRx0, ENPD), /* LPSS_I2C2_SDA */ - PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_55, 0, DEEP, NONE, HIZCRx0, ENPU), /* LPSS_I2C2_SCL */ + PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_54, 0, DEEP, NONE, HIZCRx0, DISPUPD), /* LPSS_I2C2_SDA -- unused */ + PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_55, 0, DEEP, NONE, HIZCRx0, DISPUPD), /* LPSS_I2C2_SCL -- unused */ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_56, NONE, DEEP, NF1, HIZCRx1, DISPUPD), /* LPSS_I2C3_SDA */ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_57, NONE, DEEP, NF1, HIZCRx1, DISPUPD), /* LPSS_I2C2_SCL */ PAD_CFG_GPIO_HI_Z(GPIO_58, NONE, DEEP, HIZCRx0, DISPUPD), /* LPSS_I2C4_SDA - unused */ @@ -104,7 +104,7 @@ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_75, NONE, DEEP, NF1, TxDRxE, DISPUPD), /* PROCHOT_B */ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_211, NONE, DEEP, NF1, HIZCRx1, DISPUPD), /* EMMC_RST_B */ PAD_CFG_GPI_APIC_IOS(GPIO_212, NONE, DEEP, LEVEL, INVERT, HIZCRx1, DISPUPD), /* Touch Panel Int */ - PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_213, 0, DEEP, NONE, HIZCRx0, ENPD), /* EN_PP3300_TOUCHSCREEN */ + PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_213, 0, DEEP, NONE, Tx0RxDCRx0, DISPUPD), /* EN_PP3300_TOUCHSCREEN */ PAD_CFG_GPI_APIC_IOS(GPIO_214, NONE, DEEP, LEVEL, INVERT, HIZCRx1, DISPUPD), /* P_SENSOR_INT_L */
/* NORTH COMMUNITY GPIOS */ @@ -129,9 +129,9 @@
/* Fast SPI */ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_90, DN_20K, DEEP, NF1, HIZCRx1, ENPU),/* FST_SPI_CS0_B */ - PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_91, 0, DEEP, NONE, HIZCRx0, ENPD),/* FST_SPI_CS1_B -- SPK_PA_EN_R */ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_92, NONE, DEEP, NF1, HIZCRx1, ENPD),/* FST_SPI_MOSI_IO0 */ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_93, NONE, DEEP, NF1, HIZCRx1, ENPD),/* FST_SPI_MISO_IO1 */ + PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_91, 0, DEEP, NONE, Tx1RxDCRx1, DISPUPD),/* FST_SPI_CS1_B -- SPK_PA_EN_R */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_92, NONE, DEEP, NF1, HIZCRx1, DISPUPD),/* FST_SPI_MOSI_IO0 */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_93, NONE, DEEP, NF1, HIZCRx1, DISPUPD),/* FST_SPI_MISO_IO1 */ PAD_CFG_GPIO_HI_Z(GPIO_94, NONE, DEEP, HIZCRx0, DISPUPD),/* FST_SPI_IO2 - unused */ PAD_CFG_GPIO_HI_Z(GPIO_95, NONE, DEEP, HIZCRx0, DISPUPD),/* FST_SPI_IO3 - unused */ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_96, DN_20K, DEEP, NF1, HIZCRx0, ENPD),/* FST_SPI_CLK */ @@ -148,7 +148,7 @@ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_106, UP_20K, DEEP, NF1, HIZCRx1, ENPU),/* PMU_BATLOW_B */ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_107, NONE, DEEP, NF1, TxDRxE, DISPUPD),/* PMU_RESETBUTTON_B */ PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_108, NONE, DEEP, NF1),/* PMU_SUSCLK */ - PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_109, 1, DEEP, NONE, HIZCRx1, ENPU),/* SUS_STAT_B -- BT_DISABLE_L */ + PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_109, 1, DEEP, NONE, Tx0RxDCRx0, DISPUPD),/* SUS_STAT_B -- BT_DISABLE_L */
/* I2C5 - Audio */ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_110, NONE, DEEP, NF1, HIZCRx1, DISPUPD),/* LPSS_I2C5_SDA */ diff --git a/src/mainboard/google/octopus/variants/bip/gpio.c b/src/mainboard/google/octopus/variants/bip/gpio.c index 17fc105..3d147a9 100644 --- a/src/mainboard/google/octopus/variants/bip/gpio.c +++ b/src/mainboard/google/octopus/variants/bip/gpio.c @@ -78,8 +78,8 @@ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_51, NONE, DEEP, NF1, HIZCRx1, DISPUPD), /* LPSS_I2C0_SCL */ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_52, NONE, DEEP, NF1, HIZCRx1, DISPUPD), /* LPSS_I2C1_SDA */ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_53, NONE, DEEP, NF1, HIZCRx1, DISPUPD), /* LPSS_I2C1_SCL */ - PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_54, 0, DEEP, NONE, HIZCRx0, ENPD), /* LPSS_I2C2_SDA */ - PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_55, 0, DEEP, NONE, HIZCRx0, ENPU), /* LPSS_I2C2_SCL */ + PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_54, 0, DEEP, NONE, HIZCRx0, DISPUPD), /* LPSS_I2C2_SDA -- unused */ + PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_55, 0, DEEP, NONE, HIZCRx0, DISPUPD), /* LPSS_I2C2_SCL -- unused */ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_56, NONE, DEEP, NF1, HIZCRx1, DISPUPD), /* LPSS_I2C3_SDA */ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_57, NONE, DEEP, NF1, HIZCRx1, DISPUPD), /* LPSS_I2C2_SCL */ PAD_CFG_GPIO_HI_Z(GPIO_58, NONE, DEEP, HIZCRx0, DISPUPD), /* LPSS_I2C4_SDA - unused */ @@ -102,7 +102,7 @@ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_75, NONE, DEEP, NF1, TxDRxE, DISPUPD), /* PROCHOT_B */ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_211, NONE, DEEP, NF1, HIZCRx1, DISPUPD), /* EMMC_RST_B */ PAD_CFG_GPI_APIC_IOS(GPIO_212, NONE, DEEP, LEVEL, INVERT, HIZCRx1, DISPUPD), /* Touch Panel Int */ - PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_213, 0, DEEP, NONE, HIZCRx0, ENPD), /* EN_PP3300_TOUCHSCREEN */ + PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_213, 0, DEEP, NONE, Tx0RxDCRx0, DISPUPD), /* EN_PP3300_TOUCHSCREEN */ PAD_CFG_GPI_APIC_IOS(GPIO_214, NONE, DEEP, LEVEL, INVERT, HIZCRx1, DISPUPD), /* P_SENSOR_INT_L */
/* NORTH COMMUNITY GPIOS */ @@ -127,9 +127,9 @@
/* Fast SPI */ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_90, DN_20K, DEEP, NF1, HIZCRx1, ENPU),/* FST_SPI_CS0_B */ - PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_91, 0, DEEP, NONE, HIZCRx0, ENPD),/* FST_SPI_CS1_B -- SPK_PA_EN_R */ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_92, NONE, DEEP, NF1, HIZCRx1, ENPD),/* FST_SPI_MOSI_IO0 */ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_93, NONE, DEEP, NF1, HIZCRx1, ENPD),/* FST_SPI_MISO_IO1 */ + PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_91, 0, DEEP, NONE, Tx1RxDCRx1, DISPUPD),/* FST_SPI_CS1_B -- SPK_PA_EN_R */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_92, NONE, DEEP, NF1, HIZCRx1, DISPUPD),/* FST_SPI_MOSI_IO0 */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_93, NONE, DEEP, NF1, HIZCRx1, DISPUPD),/* FST_SPI_MISO_IO1 */ PAD_CFG_GPIO_HI_Z(GPIO_94, NONE, DEEP, HIZCRx0, DISPUPD),/* FST_SPI_IO2 - unused */ PAD_CFG_GPIO_HI_Z(GPIO_95, NONE, DEEP, HIZCRx0, DISPUPD),/* FST_SPI_IO3 - unused */ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_96, DN_20K, DEEP, NF1, HIZCRx0, ENPD),/* FST_SPI_CLK */ @@ -146,7 +146,7 @@ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_106, UP_20K, DEEP, NF1, HIZCRx1, ENPU),/* PMU_BATLOW_B */ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_107, NONE, DEEP, NF1, TxDRxE, DISPUPD),/* PMU_RESETBUTTON_B */ PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_108, NONE, DEEP, NF1),/* PMU_SUSCLK */ - PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_109, 1, DEEP, NONE, HIZCRx1, ENPU),/* SUS_STAT_B -- BT_DISABLE_L */ + PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_109, 1, DEEP, NONE, Tx0RxDCRx0, DISPUPD),/* SUS_STAT_B -- BT_DISABLE_L */
/* I2C5 - Audio */ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_110, NONE, DEEP, NF1, HIZCRx1, DISPUPD),/* LPSS_I2C5_SDA */
-
Shamile Khan (Code Review)