Change in coreboot[master]: mb/google/guybrush: PCIe GPIOs - enable enables, disable resets

[Martin Roth (Code Review)]

Attention is currently required from: Furquan Shaikh.
Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52115 )

Change subject: mb/google/guybrush: PCIe GPIOs - enable enables, disable resets
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Patch Set 1:

(2 comments)

File src/mainboard/google/guybrush/variants/baseboard/gpio.c:

https://review.coreboot.org/c/coreboot/+/52115/comment/cda35922_3bda6ab5 
PS1, Line 54: HIGH
> Don't you need the *_RST{_L} signals to be deasserted before FSP-M runs?

They get toggled by the FSP. 
https://review.coreboot.org/c/coreboot/+/52114

https://review.coreboot.org/c/coreboot/+/52115/comment/5c29360e_9222ed60 
PS1, Line 169: 	/* EN_PP3300_WLAN */
> Is there any timing requirement between EN_PP3300_WLAN and WLAN_DISABLE signals? Same for WWAN?

I'm sure there are, but we haven't looked at that yet. We're going to have to adjust the timings once we start running the early gpio init in PSP verstage.
Tracked in b/184598323 - guybrush: Look at PCIe power-on timings and make sure that they're being met.