[XS] Change in coreboot[main]: drivers/pc80/rtc/option.c: Stop resetting CMOS during s3 resume

[Bill XIE (Code Review)]

Hello build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/78288?usp=email

to look at the new patch set (#4).

Change subject: drivers/pc80/rtc/option.c: Stop resetting CMOS during s3 resume
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drivers/pc80/rtc/option.c: Stop resetting CMOS during s3 resume

After commit e12b313844da ("drivers/pc80/rtc/option.c: Allow CMOS
defaults to extend to bank 1"), Thinkpad X200 with
CONFIG(STATIC_OPTION_TABLE) can no longer resume from s3 (detected via
bisect).

Further inspection shows that DRAM training result of GM45 is stored
in CMOS above 128 bytes in raminit_receive_enable_calibration.c, for
s3 resume to restore, but it will be erased by sanitize_cmos(),
leaving only "untrained" result restored, so s3 resume will fail.

However, resetting CMOS seems unnecessary during s3 resume. Now,
cmos_need_reset will be negated when acpi_is_wakeup_s3() returns true.

Tested: Thinkpad X200 with CONFIG(STATIC_OPTION_TABLE) can resume from
    s3 again with these changes.

Change-Id: I533e83f3b95f327b0e24f4d750f8812325b7770b
Signed-off-by: Bill XIE 
---
M src/drivers/pc80/rtc/option.c
1 file changed, 3 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/78288/4