Attention is currently required from: David Wu, Tarun Tuli, Martin L Roth, Ren Kuo, Eric Lai.
Reka Norman has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/71170 )
Change subject: mb/google/nissa/var/craask: Modify GPIOs for NVMe
......................................................................
Patch Set 8:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/71170/comment/75311bae_7fc48851
PS8, Line 9: Modify NVMe clkreq pin to GPP_D7 from GPP_D6.The design change is for commonality of GPIO settings. To reserve craask GPIO table and add craaskneto/craaskino's NVMe GPIO setting. In the change, clkreq# will be 2 and clksrc is still 1.
Please split this up to 72 char per line.
File src/mainboard/google/brya/variants/craask/fw_config.c:
https://review.coreboot.org/c/coreboot/+/71170/comment/77b18d19_6bc52fb4
PS8, Line 87: if (!fw_config_probe(FW_CONFIG(STORAGE, STORAGE_NVME)))
NVMe pins need to stay enabled when fw_config is unprovisioned, so use:
```
if (fw_config_is_provisioned() && !fw_config_probe(FW_CONFIG(STORAGE, STORAGE_NVME)))
```
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