Attention is currently required from: Raul Rangel, Martin L Roth, Jon Murphy, Tim Van Patten, Felix Held.
Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74112 )
Change subject: mb/google/myst: Enable PCIe devices in devicetree
......................................................................
Patch Set 36:
(1 comment)
File src/mainboard/google/myst/port_descriptors.c:
https://review.coreboot.org/c/coreboot/+/74112/comment/07a60974_2bad86c8
PS36, Line 12: .start_logical_lane = 13,
: .end_logical_lane = 13,
@Felix: I believe the corresponding logical lane is 1 based on the mapping here - https://chromium.googlesource.com/chromiumos/third_party/coreboot/+/refs/hea.... Can you please confirm?
Based on that, the logical lane ID should be updated in the rest of the table.
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