Rizwan Qureshi (rizwan.qureshi@intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18365
-gerrit
commit 3f5de82c492480109e3f60ecad3aa95c81d86661 Author: Rizwan Qureshi rizwan.qureshi@intel.com Date: Fri Jan 13 22:04:11 2017 +0530
soc/intel/skylake: Enable Systemagent IMGU
Camera and Imaging device should be enabled for camera usecase, FSP provides an UPD to enable/disable the SA IMGU (Imaging Unit) expose the same as a config option in devicetree.cb
BUG=None BRANCH=None TEST=lspci should list 00:05:00
Change-Id: I4cf7daf41bfaf4dcba414921cac2e7e12bf89f37 Signed-off-by: Rizwan Qureshi rizwan.qureshi@intel.com --- src/soc/intel/skylake/chip.h | 1 + src/soc/intel/skylake/chip_fsp20.c | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h index 1b69952..84ac11f 100644 --- a/src/soc/intel/skylake/chip.h +++ b/src/soc/intel/skylake/chip.h @@ -205,6 +205,7 @@ struct soc_intel_skylake_config {
/* Camera */ u8 Cio2Enable; + u8 SaImguEnable;
/* eMMC and SD */ u8 ScsEmmcEnabled; diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c index ebd3134..34029f3 100644 --- a/src/soc/intel/skylake/chip_fsp20.c +++ b/src/soc/intel/skylake/chip_fsp20.c @@ -169,6 +169,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) sizeof(params->SerialIoDevMode));
params->PchCio2Enable = config->Cio2Enable; + params->SaImguEnable = config->SaImguEnable; params->Heci3Enabled = config->Heci3Enabled;
params->LogoPtr = config->LogoPtr; @@ -181,7 +182,6 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) params->PchPmLanWakeFromDeepSx = config->WakeConfigPcieWakeFromDeepSx;
params->PchLanEnable = config->EnableLan; - params->PchCio2Enable = config->Cio2Enable; params->SataSalpSupport = config->SataSalpSupport; params->SsicPortEnable = config->SsicPortEnable; params->ScsEmmcEnabled = config->ScsEmmcEnabled;