Change in coreboot[master]: src: Remove unused '#include <cbfs.h>'

[HAOUAS Elyes (Code Review)]

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41682 )

Change subject: src: Remove unused '#include <cbfs.h>'
......................................................................

src: Remove unused '#include <cbfs.h>'

Found using:
diff <(git grep -l '#include <cbfs.h>' -- src/) <(git grep -l 'cbfs_boot_map_optionrom|cbfs_boot_map_optionrom_revision|cbfs_boot_locate|cbfs_boot_map_with_leak|cbfs_locate_file_in_region|cbfs_boot_load_file|cbfs_load_and_decompress|cbfs_prog_stage_load|cbfs_boot_region_device' -- src/) |grep '<' |grep -v vendorcode

Change-Id: Icaecb5b910888f34cddedab7b2f64eaf6d01ad66
Signed-off-by: Elyes HAOUAS 
---
M src/arch/arm64/fit_payload.c
M src/arch/riscv/boot.c
M src/arch/riscv/fit_payload.c
M src/drivers/pc80/rtc/mc146818rtc.c
M src/lib/fit.c
M src/lib/fit_payload.c
M src/lib/selfboot.c
M src/mainboard/facebook/fbg1701/romstage.c
M src/mainboard/intel/cannonlake_rvp/romstage_fsp_params.c
M src/mainboard/intel/kblrvp/romstage.c
M src/mainboard/intel/tglrvp/romstage_fsp_params.c
M src/mainboard/portwell/m107/romstage.c
M src/mainboard/sifive/hifive-unleashed/media.c
M src/soc/amd/common/block/psp/psp_smm.c
M src/soc/intel/apollolake/mmap_boot.c
M src/soc/intel/xeon_sp/cpx/chip.c
M src/soc/qualcomm/sc7180/aop_load_reset.c
M src/soc/qualcomm/sc7180/include/soc/qupv3_config.h
M src/soc/qualcomm/sdm845/aop_load_reset.c
19 files changed, 0 insertions(+), 19 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/41682/1

diff --git a/src/arch/arm64/fit_payload.c b/src/arch/arm64/fit_payload.c
index c8eba8d..760b48c 100644
--- a/src/arch/arm64/fit_payload.c
+++ b/src/arch/arm64/fit_payload.c
@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */

-#include <cbfs.h>
 #include <commonlib/bsd/compression.h>
 #include <console/console.h>
 #include <bootmem.h>
diff --git a/src/arch/riscv/boot.c b/src/arch/riscv/boot.c
index 7cb0a36..ab05f94 100644
--- a/src/arch/riscv/boot.c
+++ b/src/arch/riscv/boot.c
@@ -6,7 +6,6 @@
 #include <arch/encoding.h>
 #include <arch/smp/smp.h>
 #include <mcall.h>
-#include <cbfs.h>
 #include <console/console.h>

struct arch_prog_run_args {
diff --git a/src/arch/riscv/fit_payload.c b/src/arch/riscv/fit_payload.c
index 2e676c7..abce57e 100644
--- a/src/arch/riscv/fit_payload.c
+++ b/src/arch/riscv/fit_payload.c
@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */

-#include <cbfs.h>
 #include <commonlib/bsd/compression.h>
 #include <console/console.h>
 #include <bootmem.h>
diff --git a/src/drivers/pc80/rtc/mc146818rtc.c b/src/drivers/pc80/rtc/mc146818rtc.c
index 79bb5eb..3227510 100644
--- a/src/drivers/pc80/rtc/mc146818rtc.c
+++ b/src/drivers/pc80/rtc/mc146818rtc.c
@@ -9,7 +9,6 @@
 #include <option.h>
 #include <pc80/mc146818rtc.h>
 #include <rtc.h>
-#include <cbfs.h>
 #include <security/vboot/vbnv.h>
 #include <security/vboot/vbnv_layout.h>
 #include <types.h>
diff --git a/src/lib/fit.c b/src/lib/fit.c
index 90cbfca..d930c39 100644
--- a/src/lib/fit.c
+++ b/src/lib/fit.c
@@ -2,7 +2,6 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */

#include <assert.h>
-#include <cbfs.h>
 #include <console/console.h>
 #include <ctype.h>
 #include <endian.h>
diff --git a/src/lib/fit_payload.c b/src/lib/fit_payload.c
index b3a03a1..90948f9 100644
--- a/src/lib/fit_payload.c
+++ b/src/lib/fit_payload.c
@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

-#include <cbfs.h>
 #include <commonlib/bsd/compression.h>
 #include <console/console.h>
 #include <bootmem.h>
diff --git a/src/lib/selfboot.c b/src/lib/selfboot.c
index c5ad525..1af824f 100644
--- a/src/lib/selfboot.c
+++ b/src/lib/selfboot.c
@@ -7,7 +7,6 @@
 #include <stdlib.h>
 #include <string.h>
 #include <symbols.h>
-#include <cbfs.h>
 #include <lib.h>
 #include <bootmem.h>
 #include <program_loading.h>
diff --git a/src/mainboard/facebook/fbg1701/romstage.c b/src/mainboard/facebook/fbg1701/romstage.c
index 6dafd8a..f307f95 100644
--- a/src/mainboard/facebook/fbg1701/romstage.c
+++ b/src/mainboard/facebook/fbg1701/romstage.c
@@ -1,7 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

#include <build.h>
-#include <cbfs.h>
 #include <console/console.h>
 #include <chip.h>
 #include <device/pci_ops.h>
diff --git a/src/mainboard/intel/cannonlake_rvp/romstage_fsp_params.c b/src/mainboard/intel/cannonlake_rvp/romstage_fsp_params.c
index 2cd8637..5b7445f 100644
--- a/src/mainboard/intel/cannonlake_rvp/romstage_fsp_params.c
+++ b/src/mainboard/intel/cannonlake_rvp/romstage_fsp_params.c
@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

-#include <cbfs.h>
 #include <console/console.h>
 #include <fsp/api.h>
 #include <soc/romstage.h>
diff --git a/src/mainboard/intel/kblrvp/romstage.c b/src/mainboard/intel/kblrvp/romstage.c
index 281a24f..a3fb285 100644
--- a/src/mainboard/intel/kblrvp/romstage.c
+++ b/src/mainboard/intel/kblrvp/romstage.c
@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

-#include <cbfs.h>
 #include <console/console.h>
 #include <fsp/api.h>
 #include <gpio.h>
diff --git a/src/mainboard/intel/tglrvp/romstage_fsp_params.c b/src/mainboard/intel/tglrvp/romstage_fsp_params.c
index d4433a1..47507f4 100644
--- a/src/mainboard/intel/tglrvp/romstage_fsp_params.c
+++ b/src/mainboard/intel/tglrvp/romstage_fsp_params.c
@@ -6,7 +6,6 @@
 #include <spd_bin.h>
 #include <soc/meminit.h>
 #include <baseboard/variants.h>
-#include <cbfs.h>
 #include "board_id.h"
 #include "spd/spd.h"

diff --git a/src/mainboard/portwell/m107/romstage.c b/src/mainboard/portwell/m107/romstage.c
index 4f666e2..3ba12f3 100644
--- a/src/mainboard/portwell/m107/romstage.c
+++ b/src/mainboard/portwell/m107/romstage.c
@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

-#include <cbfs.h>
 #include <console/console.h>
 #include <chip.h>
 #include <device/pci_ops.h>
diff --git a/src/mainboard/sifive/hifive-unleashed/media.c b/src/mainboard/sifive/hifive-unleashed/media.c
index 9f91bcb..2ba6d2b 100644
--- a/src/mainboard/sifive/hifive-unleashed/media.c
+++ b/src/mainboard/sifive/hifive-unleashed/media.c
@@ -2,7 +2,6 @@

#include <boot_device.h>
 #include <symbols.h>
-#include <cbfs.h>
 #include <device/mmio.h>
 #include <soc/addressmap.h>
 #include <soc/spi.h>
diff --git a/src/soc/amd/common/block/psp/psp_smm.c b/src/soc/amd/common/block/psp/psp_smm.c
index b103b3e..61e0f2c 100644
--- a/src/soc/amd/common/block/psp/psp_smm.c
+++ b/src/soc/amd/common/block/psp/psp_smm.c
@@ -3,7 +3,6 @@
 #include <device/mmio.h>
 #include <cpu/x86/msr.h>
 #include <cpu/amd/msr.h>
-#include <cbfs.h>
 #include <region_file.h>
 #include <rules.h>
 #include <console/console.h>
diff --git a/src/soc/intel/apollolake/mmap_boot.c b/src/soc/intel/apollolake/mmap_boot.c
index b37d760..30c629e 100644
--- a/src/soc/intel/apollolake/mmap_boot.c
+++ b/src/soc/intel/apollolake/mmap_boot.c
@@ -1,7 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */

#include <boot_device.h>
-#include <cbfs.h>
 #include <commonlib/region.h>
 #include <console/console.h>
 #include <fmap.h>
diff --git a/src/soc/intel/xeon_sp/cpx/chip.c b/src/soc/intel/xeon_sp/cpx/chip.c
index 2125f0a..c19c0cf 100644
--- a/src/soc/intel/xeon_sp/cpx/chip.c
+++ b/src/soc/intel/xeon_sp/cpx/chip.c
@@ -1,7 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

#include <arch/ioapic.h>
-#include <cbfs.h>
 #include <console/console.h>
 #include <cpu/x86/lapic.h>
 #include <device/pci.h>
diff --git a/src/soc/qualcomm/sc7180/aop_load_reset.c b/src/soc/qualcomm/sc7180/aop_load_reset.c
index 85ea67e..f080f52 100644
--- a/src/soc/qualcomm/sc7180/aop_load_reset.c
+++ b/src/soc/qualcomm/sc7180/aop_load_reset.c
@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

-#include <cbfs.h>
 #include <halt.h>
 #include <console/console.h>
 #include <timestamp.h>
diff --git a/src/soc/qualcomm/sc7180/include/soc/qupv3_config.h b/src/soc/qualcomm/sc7180/include/soc/qupv3_config.h
index d67c0b5..b595984 100644
--- a/src/soc/qualcomm/sc7180/include/soc/qupv3_config.h
+++ b/src/soc/qualcomm/sc7180/include/soc/qupv3_config.h
@@ -4,7 +4,6 @@
 #define _SC7180_QUPV3_CONFIG_H_

#include <assert.h>
-#include <cbfs.h>
 #include <soc/clock.h>
 #include <soc/qcom_qup_se.h>

diff --git a/src/soc/qualcomm/sdm845/aop_load_reset.c b/src/soc/qualcomm/sdm845/aop_load_reset.c
index eb90f86..8a479e5 100644
--- a/src/soc/qualcomm/sdm845/aop_load_reset.c
+++ b/src/soc/qualcomm/sdm845/aop_load_reset.c
@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

-#include <cbfs.h>
 #include <console/console.h>
 #include <soc/mmu.h>
 #include <soc/aop.h>

[HAOUAS Elyes (Code Review)]

Hello Philipp Hug, Frans Hendriks, Julius Werner, Andrey Petrov, Patrick Rudolph, ron minnich, Wim Vervoorn,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/41682

to look at the new patch set (#2).

Change subject: src: Remove unused '#include <cbfs.h>'
......................................................................

src: Remove unused '#include <cbfs.h>'

Found using:
diff <(git grep -l '#include <cbfs.h>' -- src/) <(git grep -l 'cbfs_boot_map_optionrom|cbfs_boot_map_optionrom_revision|cbfs_boot_locate|cbfs_boot_map_with_leak|cbfs_locate_file_in_region|cbfs_boot_load_file|cbfs_load_and_decompress|cbfs_prog_stage_load|cbfs_boot_region_device' -- src/) |grep '<' |grep -v vendorcode

Also add missing 'include <cbfs.h>' in src/soc/qualcomm/sc7180/qupv3_config.c

Change-Id: Icaecb5b910888f34cddedab7b2f64eaf6d01ad66
Signed-off-by: Elyes HAOUAS 
---
M src/arch/arm64/fit_payload.c
M src/arch/riscv/boot.c
M src/arch/riscv/fit_payload.c
M src/drivers/pc80/rtc/mc146818rtc.c
M src/lib/fit.c
M src/lib/fit_payload.c
M src/lib/selfboot.c
M src/mainboard/facebook/fbg1701/romstage.c
M src/mainboard/intel/cannonlake_rvp/romstage_fsp_params.c
M src/mainboard/intel/kblrvp/romstage.c
M src/mainboard/intel/tglrvp/romstage_fsp_params.c
M src/mainboard/portwell/m107/romstage.c
M src/mainboard/sifive/hifive-unleashed/media.c
M src/soc/amd/common/block/psp/psp_smm.c
M src/soc/intel/apollolake/mmap_boot.c
M src/soc/intel/xeon_sp/cpx/chip.c
M src/soc/qualcomm/sc7180/aop_load_reset.c
M src/soc/qualcomm/sc7180/include/soc/qupv3_config.h
M src/soc/qualcomm/sc7180/qupv3_config.c
M src/soc/qualcomm/sdm845/aop_load_reset.c
20 files changed, 1 insertion(+), 19 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/41682/2

[HAOUAS Elyes (Code Review)]

Hello build bot (Jenkins), Philipp Hug, Frans Hendriks, Julius Werner, Andrey Petrov, Patrick Rudolph, ron minnich, Wim Vervoorn,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/41682

to look at the new patch set (#3).

Change subject: src: Remove unused '#include <cbfs.h>'
......................................................................

src: Remove unused '#include <cbfs.h>'

Found using:
diff <(git grep -l '#include <cbfs.h>' -- src/) <(git grep -l 'cbfs_boot_map_optionrom|cbfs_boot_map_optionrom_revision|cbfs_boot_locate|cbfs_boot_map_with_leak|cbfs_locate_file_in_region|cbfs_boot_load_file|cbfs_load_and_decompress|cbfs_prog_stage_load|cbfs_boot_region_device' -- src/) |grep '<' |grep -v vendorcode

Also add missing 'include <cbfs.h>' in src/soc/qualcomm/sc7180/qupv3_config.c

Change-Id: Icaecb5b910888f34cddedab7b2f64eaf6d01ad66
Signed-off-by: Elyes HAOUAS 
---
M src/arch/arm64/fit_payload.c
M src/arch/riscv/boot.c
M src/arch/riscv/fit_payload.c
M src/drivers/pc80/rtc/mc146818rtc.c
M src/mainboard/facebook/fbg1701/romstage.c
M src/mainboard/intel/cannonlake_rvp/romstage_fsp_params.c
M src/mainboard/intel/kblrvp/romstage.c
M src/mainboard/intel/tglrvp/romstage_fsp_params.c
M src/mainboard/portwell/m107/romstage.c
M src/mainboard/sifive/hifive-unleashed/media.c
M src/soc/amd/common/block/psp/psp_smm.c
M src/soc/intel/apollolake/mmap_boot.c
M src/soc/intel/xeon_sp/cpx/chip.c
M src/soc/qualcomm/sc7180/aop_load_reset.c
M src/soc/qualcomm/sc7180/include/soc/qupv3_config.h
M src/soc/qualcomm/sc7180/qupv3_config.c
M src/soc/qualcomm/sdm845/aop_load_reset.c
17 files changed, 1 insertion(+), 16 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/41682/3

[HAOUAS Elyes (Code Review)]

Hello build bot (Jenkins), Philipp Hug, Frans Hendriks, Julius Werner, Andrey Petrov, Patrick Rudolph, ron minnich, Wim Vervoorn,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/41682

to look at the new patch set (#4).

Change subject: src: Remove unused '#include <cbfs.h>'
......................................................................

src: Remove unused '#include <cbfs.h>'

Found using:
diff <(git grep -l '#include <cbfs.h>' -- src/) <(git grep -l 'cbfs_boot_map_optionrom|cbfs_boot_map_optionrom_revision|cbfs_boot_locate|cbfs_boot_map_with_leak|cbfs_locate_file_in_region|cbfs_boot_load_file|cbfs_load_and_decompress|cbfs_prog_stage_load|cbfs_boot_region_device' -- src/) |grep '<' |grep -v vendorcode

Also add missing 'include <cbfs.h>' in src/soc/qualcomm/sc7180/qupv3_config.c

Change-Id: Icaecb5b910888f34cddedab7b2f64eaf6d01ad66
Signed-off-by: Elyes HAOUAS 
---
M src/arch/riscv/fit_payload.c
M src/drivers/pc80/rtc/mc146818rtc.c
M src/mainboard/facebook/fbg1701/romstage.c
M src/mainboard/intel/cannonlake_rvp/romstage_fsp_params.c
M src/mainboard/intel/kblrvp/romstage.c
M src/mainboard/intel/tglrvp/romstage_fsp_params.c
M src/mainboard/portwell/m107/romstage.c
M src/mainboard/sifive/hifive-unleashed/media.c
M src/soc/amd/common/block/psp/psp_smm.c
M src/soc/intel/apollolake/mmap_boot.c
M src/soc/intel/xeon_sp/cpx/chip.c
M src/soc/qualcomm/sc7180/aop_load_reset.c
M src/soc/qualcomm/sc7180/include/soc/qupv3_config.h
M src/soc/qualcomm/sc7180/qupv3_config.c
M src/soc/qualcomm/sdm845/aop_load_reset.c
15 files changed, 1 insertion(+), 14 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/41682/4

[HAOUAS Elyes (Code Review)]

HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41682 )

Change subject: src: Remove unused '#include <cbfs.h>'
......................................................................

Patch Set 4:

so many indirect-indirect and indirect includes ....

[HAOUAS Elyes (Code Review)]

Hello build bot (Jenkins), Philipp Hug, Frans Hendriks, Julius Werner, Andrey Petrov, Patrick Rudolph, ron minnich, Wim Vervoorn,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/41682

to look at the new patch set (#5).

Change subject: src: Remove unused '#include <cbfs.h>'
......................................................................

src: Remove unused '#include <cbfs.h>'

Found using:
diff <(git grep -l '#include <cbfs.h>' -- src/) <(git grep -l 'cbfs_boot_map_optionrom|cbfs_boot_map_optionrom_revision|cbfs_boot_locate|cbfs_boot_map_with_leak|cbfs_locate_file_in_region|cbfs_boot_load_file|cbfs_load_and_decompress|cbfs_prog_stage_load|cbfs_boot_region_device' -- src/) |grep '<' |grep -v vendorcode

Also add missing 'include <cbfs.h>' in src/soc/qualcomm/sc7180/qupv3_config.c

Change-Id: Icaecb5b910888f34cddedab7b2f64eaf6d01ad66
Signed-off-by: Elyes HAOUAS 
---
M src/arch/riscv/fit_payload.c
M src/drivers/pc80/rtc/mc146818rtc.c
M src/mainboard/facebook/fbg1701/romstage.c
M src/mainboard/intel/cannonlake_rvp/romstage_fsp_params.c
M src/mainboard/intel/kblrvp/romstage.c
M src/mainboard/intel/tglrvp/romstage_fsp_params.c
M src/mainboard/portwell/m107/romstage.c
M src/mainboard/sifive/hifive-unleashed/media.c
M src/soc/amd/common/block/psp/psp_smm.c
M src/soc/intel/apollolake/mmap_boot.c
M src/soc/intel/xeon_sp/cpx/chip.c
11 files changed, 0 insertions(+), 11 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/41682/5

[HAOUAS Elyes (Code Review)]

HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41682 )

Change subject: src: Remove unused '#include <cbfs.h>'
......................................................................

Patch Set 5:

indirect includes makes cleaning so difficult ...  😞

[HAOUAS Elyes (Code Review)]

Hello build bot (Jenkins), Philipp Hug, Frans Hendriks, Julius Werner, Andrey Petrov, Patrick Rudolph, ron minnich, Wim Vervoorn,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/41682

to look at the new patch set (#6).

Change subject: src: Remove unused '#include <cbfs.h>'
......................................................................

src: Remove unused '#include <cbfs.h>'

Found using:
diff <(git grep -l '#include <cbfs.h>' -- src/) <(git grep -l 'cbfs_boot_map_optionrom|cbfs_boot_map_optionrom_revision|cbfs_boot_locate|cbfs_boot_map_with_leak|cbfs_locate_file_in_region|cbfs_boot_load_file|cbfs_load_and_decompress|cbfs_prog_stage_load|cbfs_boot_region_device' -- src/) |grep '<' |grep -v vendorcode

Also add missing 'include <cbfs.h>' in src/soc/qualcomm/sc7180/qupv3_config.c

Change-Id: Icaecb5b910888f34cddedab7b2f64eaf6d01ad66
Signed-off-by: Elyes HAOUAS 
---
M src/arch/riscv/fit_payload.c
M src/drivers/pc80/rtc/mc146818rtc.c
M src/mainboard/facebook/fbg1701/romstage.c
M src/mainboard/intel/cannonlake_rvp/romstage_fsp_params.c
M src/mainboard/intel/kblrvp/romstage.c
M src/mainboard/intel/tglrvp/romstage_fsp_params.c
M src/mainboard/portwell/m107/romstage.c
M src/mainboard/sifive/hifive-unleashed/media.c
M src/soc/intel/apollolake/mmap_boot.c
M src/soc/intel/xeon_sp/cpx/chip.c
10 files changed, 0 insertions(+), 10 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/41682/6

[Wim Vervoorn (Code Review)]

Wim Vervoorn has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41682 )

Change subject: src: Remove unused '#include <cbfs.h>'
......................................................................

Patch Set 6: Code-Review+2

[Paul Menzel (Code Review)]

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41682 )

Change subject: src: Remove unused '#include <cbfs.h>'
......................................................................

Patch Set 6: Code-Review+1

[Angel Pons (Code Review)]

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41682 )

Change subject: src: Remove unused '#include <cbfs.h>'
......................................................................

Patch Set 7: Code-Review+2

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/41682 )

Change subject: src: Remove unused '#include <cbfs.h>'
......................................................................

src: Remove unused '#include <cbfs.h>'

Found using:
diff <(git grep -l '#include <cbfs.h>' -- src/) <(git grep -l 'cbfs_boot_map_optionrom|cbfs_boot_map_optionrom_revision|cbfs_boot_locate|cbfs_boot_map_with_leak|cbfs_locate_file_in_region|cbfs_boot_load_file|cbfs_load_and_decompress|cbfs_prog_stage_load|cbfs_boot_region_device' -- src/) |grep '<' |grep -v vendorcode

Also add missing 'include <cbfs.h>' in src/soc/qualcomm/sc7180/qupv3_config.c

Change-Id: Icaecb5b910888f34cddedab7b2f64eaf6d01ad66
Signed-off-by: Elyes HAOUAS 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41682
Reviewed-by: Angel Pons 
Reviewed-by: Wim Vervoorn 
Reviewed-by: Paul Menzel 
Tested-by: build bot (Jenkins) 
---
M src/arch/riscv/fit_payload.c
M src/drivers/pc80/rtc/mc146818rtc.c
M src/mainboard/facebook/fbg1701/romstage.c
M src/mainboard/intel/cannonlake_rvp/romstage_fsp_params.c
M src/mainboard/intel/kblrvp/romstage.c
M src/mainboard/intel/tglrvp/romstage_fsp_params.c
M src/mainboard/portwell/m107/romstage.c
M src/mainboard/sifive/hifive-unleashed/media.c
M src/soc/intel/apollolake/mmap_boot.c
M src/soc/intel/xeon_sp/cpx/chip.c
10 files changed, 0 insertions(+), 10 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Paul Menzel: Looks good to me, but someone else must approve
  Wim Vervoorn: Looks good to me, approved
  Angel Pons: Looks good to me, approved

diff --git a/src/arch/riscv/fit_payload.c b/src/arch/riscv/fit_payload.c
index 2e676c7..abce57e 100644
--- a/src/arch/riscv/fit_payload.c
+++ b/src/arch/riscv/fit_payload.c
@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */

-#include <cbfs.h>
 #include <commonlib/bsd/compression.h>
 #include <console/console.h>
 #include <bootmem.h>
diff --git a/src/drivers/pc80/rtc/mc146818rtc.c b/src/drivers/pc80/rtc/mc146818rtc.c
index 79bb5eb..3227510 100644
--- a/src/drivers/pc80/rtc/mc146818rtc.c
+++ b/src/drivers/pc80/rtc/mc146818rtc.c
@@ -9,7 +9,6 @@
 #include <option.h>
 #include <pc80/mc146818rtc.h>
 #include <rtc.h>
-#include <cbfs.h>
 #include <security/vboot/vbnv.h>
 #include <security/vboot/vbnv_layout.h>
 #include <types.h>
diff --git a/src/mainboard/facebook/fbg1701/romstage.c b/src/mainboard/facebook/fbg1701/romstage.c
index 6dafd8a..f307f95 100644
--- a/src/mainboard/facebook/fbg1701/romstage.c
+++ b/src/mainboard/facebook/fbg1701/romstage.c
@@ -1,7 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

#include <build.h>
-#include <cbfs.h>
 #include <console/console.h>
 #include <chip.h>
 #include <device/pci_ops.h>
diff --git a/src/mainboard/intel/cannonlake_rvp/romstage_fsp_params.c b/src/mainboard/intel/cannonlake_rvp/romstage_fsp_params.c
index 2cd8637..5b7445f 100644
--- a/src/mainboard/intel/cannonlake_rvp/romstage_fsp_params.c
+++ b/src/mainboard/intel/cannonlake_rvp/romstage_fsp_params.c
@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

-#include <cbfs.h>
 #include <console/console.h>
 #include <fsp/api.h>
 #include <soc/romstage.h>
diff --git a/src/mainboard/intel/kblrvp/romstage.c b/src/mainboard/intel/kblrvp/romstage.c
index 281a24f..a3fb285 100644
--- a/src/mainboard/intel/kblrvp/romstage.c
+++ b/src/mainboard/intel/kblrvp/romstage.c
@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

-#include <cbfs.h>
 #include <console/console.h>
 #include <fsp/api.h>
 #include <gpio.h>
diff --git a/src/mainboard/intel/tglrvp/romstage_fsp_params.c b/src/mainboard/intel/tglrvp/romstage_fsp_params.c
index d4433a1..47507f4 100644
--- a/src/mainboard/intel/tglrvp/romstage_fsp_params.c
+++ b/src/mainboard/intel/tglrvp/romstage_fsp_params.c
@@ -6,7 +6,6 @@
 #include <spd_bin.h>
 #include <soc/meminit.h>
 #include <baseboard/variants.h>
-#include <cbfs.h>
 #include "board_id.h"
 #include "spd/spd.h"

diff --git a/src/mainboard/portwell/m107/romstage.c b/src/mainboard/portwell/m107/romstage.c
index 4f666e2..3ba12f3 100644
--- a/src/mainboard/portwell/m107/romstage.c
+++ b/src/mainboard/portwell/m107/romstage.c
@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

-#include <cbfs.h>
 #include <console/console.h>
 #include <chip.h>
 #include <device/pci_ops.h>
diff --git a/src/mainboard/sifive/hifive-unleashed/media.c b/src/mainboard/sifive/hifive-unleashed/media.c
index 9f91bcb..2ba6d2b 100644
--- a/src/mainboard/sifive/hifive-unleashed/media.c
+++ b/src/mainboard/sifive/hifive-unleashed/media.c
@@ -2,7 +2,6 @@

#include <boot_device.h>
 #include <symbols.h>
-#include <cbfs.h>
 #include <device/mmio.h>
 #include <soc/addressmap.h>
 #include <soc/spi.h>
diff --git a/src/soc/intel/apollolake/mmap_boot.c b/src/soc/intel/apollolake/mmap_boot.c
index b37d760..30c629e 100644
--- a/src/soc/intel/apollolake/mmap_boot.c
+++ b/src/soc/intel/apollolake/mmap_boot.c
@@ -1,7 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */

#include <boot_device.h>
-#include <cbfs.h>
 #include <commonlib/region.h>
 #include <console/console.h>
 #include <fmap.h>
diff --git a/src/soc/intel/xeon_sp/cpx/chip.c b/src/soc/intel/xeon_sp/cpx/chip.c
index 2125f0a..c19c0cf 100644
--- a/src/soc/intel/xeon_sp/cpx/chip.c
+++ b/src/soc/intel/xeon_sp/cpx/chip.c
@@ -1,7 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */

#include <arch/ioapic.h>
-#include <cbfs.h>
 #include <console/console.h>
 #include <cpu/x86/lapic.h>
 #include <device/pci.h>

[9elements QA (Code Review)]

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41682 )

Change subject: src: Remove unused '#include <cbfs.h>'
......................................................................

Patch Set 8:

Automatic boot test returned (PASS/FAIL/TOTAL): 4/0/4
Emulation targets:
"QEMU x86 q35/ich9" using payload TianoCore : SUCCESS : https://lava.9esec.io/r/4616
"QEMU x86 q35/ich9" using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/4615
"QEMU x86 i440fx/piix4" using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/4614
"QEMU AArch64" using payload LinuxBoot_u-root_kexec : SUCCESS : https://lava.9esec.io/r/4613

Please note: This test is under development and might not be accurate at all!