[S] Change in coreboot[master]: soc/amd/common/block/lpc/lpc: increase size of SPI BAR to 4kByte - coreboot-gerrit

1 May 2023


      Attention is currently required from: Jason Glenesk, Raul Rangel, Fred Reitberger, Felix Held.
Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/74844 )
Change subject: soc/amd/common/block/lpc/lpc: increase size of SPI BAR to 4kByte
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Patch Set 1: Code-Review+1
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I8806128bdce8988f5cd7c8fa8a342fdb01eb7f42
Gerrit-Change-Number: 74844
Gerrit-PatchSet: 1
Gerrit-Owner: Felix Held felix-coreboot@felixheld.de
Gerrit-Reviewer: Fred Reitberger reitbergerfred@gmail.com
Gerrit-Reviewer: Jason Glenesk jason.glenesk@gmail.com
Gerrit-Reviewer: Matt DeVillier matt.devillier@amd.corp-partner.google.com
Gerrit-Reviewer: Raul Rangel rrangel@chromium.org
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Gerrit-Comment-Date: Mon, 01 May 2023 16:22:54 +0000
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