the following patch was just integrated into master: commit e05cba2c7225d43913fea3b0066f2e24990cee6f Author: Marc Jones marc.jones@se-eng.com Date: Wed Oct 30 23:56:26 2013 -0600
intel/lynxpoint: Add SATA DEVSLP disable option
Add the chip option to disable SATA DEVSLP. This disables the SDS bit in the SATA CAP2 register.
BUG=chrome-os-partner:23186 BRANCH=leon TEST=Manual: System runs without SATA failure for more than 10 hours
Original-Change-Id: I8baa40935421769aeee341a78441fb19ecaa3206 Signed-off-by: Marc Jones marc.jones@se-eng.com Reviewed-on: https://chromium-review.googlesource.com/174648 Reviewed-by: Shawn Nematbakhsh shawnn@chromium.org (cherry picked from commit 49d25812b04a983d687a53a39530559ba99fd9b4)
Change-Id: Iac0b32f80958f5ffb571733484dc931bee216f55 Signed-off-by: Matt DeVillier matt.devillier@gmail.com Signed-off-by: Marc Jones marc.jones@se-eng.com Reviewed-on: https://chromium-review.googlesource.com/176352 Reviewed-by: Shawn Nematbakhsh shawnn@chromium.org Reviewed-by: Duncan Laurie dlaurie@chromium.org Reviewed-on: http://review.coreboot.org/6013 Tested-by: build bot (Jenkins)
See http://review.coreboot.org/6013 for details.
-gerrit